ISL62883IRTZ Intersil, ISL62883IRTZ Datasheet - Page 16

• Manufacturer Part Number: ISL62883IRTZ
• Description: IC REG PWM 3PHASE BUCK 40TQFN
• Manufacturer: Intersil

Specifications of ISL62883IRTZ

• Applications: Controller, Intel IMVP-6.5™
• Voltage - Input: 5 V ~ 21 V
• Number Of Outputs: 1
• Voltage - Output: 0.0125 V ~ 1.5 V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 11. DIFFERENTIAL-SENSING CURRENT
Sometimes, it is difficult to implement symmetrical
layout. For the circuit shown in Figure 10, asymmetric
layout causes different R
current imbalance. Figure 11 shows a differential-sensing
current balancing circuit recommended for ISL62883.
The current sensing traces should be routed to the
inductor pads so they only pick up the inductor DCR
voltage. Each ISEN pin sees the average voltage of three
sources: its own phase inductor phase-node pad, and the
other two phases inductor output side pads. Equations 8
thru 10 give the ISEN pin voltages:
The ISL62883 will make V
in:
Rewriting Equation 11 gives:
and rewriting Equation 12 gives:
Combining Equations 13 and 14 gives:
Therefore:
V
V
V
V
V
V
R
V
V
1p
ISEN1
1p
1n
1p
ISEN2
ISEN3
2p
dcr1
INTERNAL
–
TO IC
+
+
–
–
V
ISEN3
ISEN2
ISEN1
V
V
V
V
×
1n
1n
2n
2p
2n
I
=
L1
=
=
+
+
=
=
V
=
V
V
V
V
=
1p
1n
1n
V
BALANCING CIRCUIT
V
V
3n
3n
2p
R
2p
3p
+
+
+
Cs
Cs
Cs
dcr2
Phase3
Phase2
Phase1
V
=
=
V
V
–
–
–
2n
2p
2n
V
V
V
V
V
2n
2n
3n
1n
1n
×
+
Rs
Rs
Rs
Rs
Rs
Rs
Rs
Rs
Rs
+
+
I
V
L2
V
V
+
+
=
V1p
V2p
3n
V3p
3n
3p
V
V
V
=
2p
2n
pcb1
3p
R
16
ISEN1
+
+
–
dcr3
V
V
V
, R
3n
3p
3n
L1
×
L2
L3
pcb2
= V
I
L3
IL3
IL2
IL1
Rdcr1
Rdcr2
Rdcr3
ISEN2
and R
V3n
V2n
V1n
Rpcb2
Rpcb1
Rpcb3
ISL62883, ISL62883B
= V
pcb3
ISEN3
thus
(EQ. 10)
(EQ. 15)
V o
(EQ. 14)
(EQ. 16)
(EQ. 12)
(EQ. 13)
(EQ. 11)
(EQ. 8)
(EQ. 9)
as
Current balancing (I
when there is R
R
FIGURE 12. ISL62883 EVALUATION BOARD CURRENT
pcb3
will not have any effect.
BALANCING DURING DYNAMIC
OPERATION. CH1: IL1, CH2: I
IL2, CH4: IL3
dcr1
L1
= R
= I
dcr2
REP RATE = 100kHz
REP RATE = 200kHz
REP RATE = 10kHz
REP RATE = 50kHz
REP RATE = 25kHz
L2
= R
= I
L3
dcr3
) will be achieved
. R
pcb1
LOAD
, R
pcb2
, CH3:
FN6891.3
and