ZL2105ALNF Intersil, ZL2105ALNF Datasheet

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... VSEN Chg SMBus Pump Figure 1. Block Diagram | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners ZL2105 March 30, 2011 C/SMBus™ communication bus V OUT Copyright © Intersil Americas Inc. 2009, 2011. All Rights Reserved ...

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Electrical Characteristics ............................................................................................................................................... 3 2. Pin Descriptions ............................................................................................................................................................ 6 3. Typical Application Circuit ........................................................................................................................................... 8 4. ZL2105 Overview ....................................................................................................................................................... 10 4.1 Digital-DC Architecture ........................................................................................................................................ 10 4.2 Power Conversion Overview ................................................................................................................................ 11 4.3 Power Management Overview .............................................................................................................................. 12 4.4 Multi-mode ...

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Electrical Characteristics Table 1. Absolute Maximum Ratings Voltage measured with respect to SGND. Operating beyond these limits may cause permanent damage to the device. Functional operation beyond the Recommended Operating Conditions is not implied. Parameter DC Supply Voltage Logic ...

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Table 3. Electrical Specifications - unless otherwise noted. Typical values are at T DDP DDS A Parameter Input and Supply Characteristics I supply current DDS I supply current ...

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Table 3. Electrical Characteristics (continued - unless otherwise noted. Typical values are at T DDP DDS A Parameter Oscillator and Switching Characteristics Switch node current Switching ...

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Pin Descriptions DGND SYNC UVLO SDA SALRT XTEMP Figure 2. ZL2105 Pin Configurations (top view) Table 4. Pin Descriptions 1 Pin Label Type 1 DGND PWR SYNC I/ I,M 3 UVLO I ILIM I,M ...

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Table 4. Pin Descriptions (continued) 1 Pin Label Type Description PGND PWR Power ground. Common return for internal switching MOSFETs. 20,21 SW I/O Switching node (level-shift common). 22,23 24,25 VDDP PWR Bias power for internal switching MOSFETs (return is PGND). ...

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Typical Application Circuit The following application circuit represents a typical implementation of the ZL2105. ENABLE PGOOD C/SMBus Ferrite bead is optional for input noise suppression Figure 3. ...

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For all applications, the ZL2105 must be derated according to the Safe Operating Area (SOA) curves 4. ≤ 125° 2.2μH Circuit from Figure 3 except L=2.2μH. Appropriate L ...

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... C/SMBus interface using an available computer and the included USB cable. Application notes and reference designs are available to assist the user in designing to specific application demands. Please www.intersil.com/zilkerlabs/ date documentation or call your local Zilker Labs sales Advanced office to order an evaluation kit. The ZL2105 ...

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Power Conversion Overview > > MGN MGN ILIM ILIM VTRK VTRK POWER MANAGEMENT POWER MANAGEMENT FC FC COMPENSATOR COMPENSATOR COMPENSATOR COMPENSATOR SYNC SYNC GEN GEN SYNC SYNC RESET RESET REF REF SALRT SALRT SDA SDA ...

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Power Management Overview The ZL2105 incorporates a wide range of configurable power management features that are simple to implement with no external components. Additionally, the ZL2105 includes circuit protection features that continuously safeguard the device and load from damage ...

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Power Conversion Functional Description 5.1 Internal Bias Regulators and Input Supply Connections The ZL2105 employs three internal low dropout (LDO) regulators to supply bias voltages for internal circuitry as follows: VR: The VR LDO provides a regulated 5 V ...

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Internal Charge Pump: A voltage doubler circuit can be used to optimize efficiency when operating from an input supply that is below may occasionally drop below 9 V. The internal charge pump is enabled by connecting a ...

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Output voltage Selection The output voltage may be set to any voltage between 0.6 V and 5.0 V provided that the input voltage is higher than the desired output voltage by an amount sufficient to prevent the device from ...

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Start-up Procedure The ZL2105 follows a specific internal start-up procedure after power is applied to the VDD pins (VDDL, VDDP, and VDDS). Table 8 describes the start-up sequence. If the device synchronized to an external clock ...

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Table 10. Soft Start Ramp Settings SS Pin Setting Soft Start Ramp Time LOW 10 ms OPEN 50 ms HIGH 100 ms If the desired soft start delay and ramp times are not one of the values listed in Table ...

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SYNC 200kHz – 2MHz A) SYNC = output N/C SYNC 200kHz – 2MHz ZL2105 Configuration C: SYNC AUTO DETECT When the SYNC pin is configured in auto detect mode (CFG pin is left OPEN), the device will automatically check for ...

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Table 14. R Resistor Values SYNC SYNC SW 200 kHz 571 kHz 10 k 222 kHz 615 kHz 11 k 242 kHz 667 kHz 12.1 k 267 kHz 727 kHz 13.3 k 296 kHz 889 kHz ...

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A good starting point is to select the output inductor ripple equal to the expected load transient step magnitude (I ): ostep I I opp ostep Now the output inductance can be calculated using the following equation, where V ...

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After a capacitor has been selected, the resulting output voltage ripple can be calculated using the following equation ESR orip opp 8 f Because each part of this equation was made to be less than or equal to ...

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Current Sensing and Current Limit Threshold Selection It is recommended that the user include a current limiting mechanism in their design to protect the power supply from damage and prevent excessive current from being drawn from the input supply ...

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Table 19. Resistor Settings for Loop Compensation NLR f Range n f /60 < Off f /120 < /240 < /60 < /120 < /240 ...

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The NLR loop is enabled through the FC pin by selecting the appropriate resistor value for the loop compensation settings in Table 19. When operating the ZL2105 with a switching frequency greater than 1333 kHz, NLR must be disabled. 5.13 ...

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Power Good (PG) and Output Overvoltage Protection The ZL2105 provides a Power Good (PG) signal that indicates the output voltage is within a specified tolerance of its target level and no fault condition exists. By default, the PG pin ...

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Figure 17. Output Responses to Pre-bias Voltages If a pre-bias voltage higher than the target voltage exists after the pre-configured delay period has expired, the target voltage is set to match the existing pre-bias voltage and both drivers are enabled ...

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Continue operating through the fault (this could result in permanent damage to the power supply). 5. Initiate an immediate shutdown. If the user has configured the device to restart, the device will wait the preset delay period (if so ...

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Table 22. Tracking Mode Configuration Tracking R Upper Track Limit SS Ratio 100% 12.1 k Limited by VTRK pin 13.3 k 14.7 k 16.2 k 50% 17.8 k Limited by VTRK pin 19.6 k The ZL2105 ...

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I C/SMBus Communications 2 The ZL2105 provides an I C/SMBus digital interface that enables the user to configure all aspects of the device operation as well as monitor the input and output parameters. The ZL2105 can be used ...

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Selecting the phase offset for the device is accomplished by selecting a device address according to the following equation: Phase offset = device address x 45° For example: A device address of 0x00 or 0x20 would configure no phase offset ...

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For example, addresses 0x20, 0x25 and 0x27 are all within the same group. Addresses 0x1F, 0x20 and 0x28 are all in different groups. Device in the same address group can broadcast power on and power ...

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Non-Volatile Memory and Device Security Features The ZL2105 has internal non-volatile memory where user configurations are stored. Integrated security measures ensure that the user can only restore the device to a level that has been made available to them. ...

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Package Dimensions 33 ZL2105 FN6851.2 March 30, 2011 ...

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... PART (Notes 2, 3) MARKING 2105 ZL2105ALNF 2105 ZL2105ALNFT (Note 1) 2105 ZL2105ALNFT1 (Note 1) Evaluation Board ZL2105EVK2 Notes: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

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... Page 34, Updated Ordering Information. Added ZL2105ALNF, ZL2105ALNFT1, ZL2105EVK2, tape and reel note, Pb-free note based on lead finish and MSL note. Changed Pkg. Dwg. # from L36.6x6A to L36.6x6C Page 34, corrected Application Note numbers in Related Documentation. ...

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... WHETHER DIRECT, INDIRECT, CONSEQUENTIAL (INCLUDING LOSS OF PROFITS), OR OTHERWISE, RESULTING FROM THE REFERENCE DESIGNS OR ANY USE THEREOF. Any use of such reference designs is at your own risk and you agree to indemnify Intersil Corporation and it’s subsidiaries including Zilker Labs, Inc. for any damages resulting from such use. ...