NUTINY-SDK-M0516 Nuvoton Technology Corporation of America, NUTINY-SDK-M0516 Datasheet - Page 223

• Manufacturer Part Number: NUTINY-SDK-M0516
• Description: BOARD EVAL NUMICRO M051 SERIES
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r
• Type: MCUr

Specifications of NUTINY-SDK-M0516

• Contents: Board, Cable
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: M051™ Series, M052/M054/M058/M0516

NuMicro M051
[19]
[18]
[17]
[16]
[15:8]
[7]
[6]
[5]
[4]
CAPCH3EN
CFL_IE3
CRL_IE3
INV3
Reserved
CFLRI2
CRLRI2
Reserved
CAPIF2
™
Capture Channel 3 transition Enable/Disable
1 = Enable capture function on PWM group channel 3
0 = Disable capture function on PWM group channel 3
When Enable, Capture latched the PMW-counter and saved to CRLR (Rising latch)
and CFLR (Falling latch).
When Disable, Capture does not update CRLR and CFLR, and disable PWM group
channel 3 Interrupt.
PWM Group Channel 3 Falling Latch Interrupt Enable
1 = Enable falling latch interrupt
0 = Disable falling latch interrupt
When Enable, if Capture detects PWM group channel 3 has falling transition, Capture
issues an Interrupt.
PWM Group Channel 3 Rising Latch Interrupt Enable
1 = Enable rising latch interrupt
0 = Disable rising latch interrupt
When Enable, if Capture detects PWM group channel 3 has rising transition, Capture
issues an Interrupt.
PWM Group Channel 3 Inverter ON/OFF
1 = Inverter ON. Reverse the input signal from GPIO before fed to Capture timer
0 = Inverter OFF
Reserved
CFLR2 Latched Indicator Bit
When PWM group input channel 2 has a falling transition, CFLR2 was latched with
the value of PWM down-counter and this bit is set by hardware.
Note: Write 1 to clear this bit to zero.
CRLR2 Latched Indicator Bit
When PWM group input channel 2 has a rising transition, CRLR2 was latched with
the value of PWM down-counter and this bit is set by hardware.
Note: Write 1 to clear this bit to zero.
Reserved
Capture2 Interrupt Indication Flag
If PWM group channel 2 rising latch interrupt is enabled (CRL_IE2=1), a rising
transition occurs at PWM group channel 2 will result in CAPIF2 to high; Similarly, a
falling transition will cause CAPIF2 to be set high if PWM group channel 2 falling
latch interrupt is enabled (CFL_IE2=1).
Note: Write 1 to clear this bit to zero.
Series Technical Reference Manual
- 223 -
Publication Release Date: Sept 14, 2010
Revision V1.2