NUTINY-SDK-M0516 Nuvoton Technology Corporation of America, NUTINY-SDK-M0516 Datasheet - Page 249

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NUTINY-SDK-M0516

Manufacturer Part Number
NUTINY-SDK-M0516
Description
BOARD EVAL NUMICRO M051 SERIES
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro M051™r
Type
MCUr
Datasheets

Specifications of NUTINY-SDK-M0516

Contents
Board, Cable
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
M051™ Series, M052/M054/M058/M0516
SPI Divider Register (SPI_DIVIDER)
NuMicro M051
Register
SPI_DIVIDER
Bits
[31:16]
[15:0]
31
23
15
7
Descriptions
DIVIDER2
DIVIDER
Offset
SPIx_BA+ 0x04 R/W
30
22
14
6
29
21
13
5
Series Technical Reference Manual
R/W
Clock Divider 2 Register (master only)
The value in this field is the 2
generate the serial clock on the output SPICLK. The desired frequency is
obtained according to the following equation:
Clock Divider Register (master only)
The value in this field is the frequency divider of the system clock, PCLK, to
generate the serial clock on the output SPICLK. The desired frequency is
obtained according to the following equation:
In slave mode, the period of SPI clock driven by a master shall equal or over 5
times the period of PCLK. In other words, the maximum frequency of SPI clock
is the fifth of the frequency of slave’s PCLK.
f
f
sclk
sclk
Description
Clock Divider Register (Master Only)
=
=
(
(
DIVIDER
DIVIDER
28
20
12
DIVIDER2[15:8]
4
DIVIDER2[7:0]
DIVIDER[15:8]
DIVIDER[7:0]
- 249 -
f
f
psclk
psclk
2
+
+
1
* )
1
27
19
11
3
* )
2
2
nd
Publication Release Date: Sept 14, 2010
frequency divider of the system clock, PCLK, to
26
18
10
2
25
17
9
1
Revision V1.2
Reset Value
0x0000_0000
24
16
8
0

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