C8051F380DK Silicon Laboratories Inc, C8051F380DK Datasheet - Page 15

DEV KIT FOR C8051F380

C8051F380DK

Manufacturer Part Number
C8051F380DK
Description
DEV KIT FOR C8051F380
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F380DK

Processor To Be Evaluated
C8051F380
Processor Series
C8051F38x
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-2012
15
USB Register Access Scheme
Two SFRs used to provide access
to the configuration registers
(USB0ADR and USB0DAT)
Endpoint Access via the Index
register
USB Endpoint FIFOs accessed via
the indexing scheme
First set USB0ADR to define the USB
register to access
Write/Read data to/from USB0DAT
Set USB0ADR to point to the Index
register
Use USB0DAT to write the endpoint
address desired into the index register
Switch USB0ADR to point to the
Endpoint Control/Status registers
Use USB0DAT to write/read data
to/from the endpoint registers
USB clock must be active when accessing the USB0 Control/Status registers
SFRs
Indexed Registers
Registers
Indexed

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