DC1298A-AA Linear Technology, DC1298A-AA Datasheet - Page 18

• Manufacturer Part Number: DC1298A-AA
• Description: BOARD EVAL LTM9002-AA
• Manufacturer: Linear Technology
• Type: Baseband Receiverr

Specifications of DC1298A-AA

• Design Resources: Demo Circuit 1298A Schematic
• Frequency: 0Hz ~ 300MHz
• Features: LTM9002 14bit Dual Receiver Subsystem, DC-170MHz LPF
• Tool / Board Applications: Wireless Connectivity-ZigBee, RF, Infrared, USB
• Mcu Supported Families: LTM9002
• Development Tool Type: Hardware - Eval/Demo Board
• For Use With/related Products: LTM9002
• Lead Free Status / RoHS Status: Not applicable / Not applicable

OPERATION
LTM9002
reference adjusts the ADC span proportionately; see
Adjusting the full-scale input range. Powering down the
auxiliary DAC disables the ADC span trim control. When
the auxiliary DAC is powered down, connect SENSE to
V
Power-On Reset
The auxiliary DACs clear the outputs to zero-scale when
power is fi rst applied, making system initialization con-
sistent and repeatable.
Transfer Function
The digital-to-analog transfer function is;
where k is the decimal equivalent of the binary DAC input
code, N is the resolution and V
reference voltage of the ADC.
Serial Interface
All serial interface pins (CS/LD, SCK and SDI) have TTL input
levels and are 5V tolerant. The CS/LD input is level trig-
gered. When this input is taken low, it acts as a chip-select
signal, activating the SDI and SCK buffers and enabling the
input shift register. Data (SDI input) is transferred at the
next 24 rising SCK edges. The 4-bit command, C3-C0, is
loaded fi rst; then the 4-bit DAC address, A3-A0; and fi nally
the 16-bit data word. The data word comprises the 12-bit
input code, ordered MSB-to-LSB, followed by 4 don’t-care
bits. Data can only be transferred to the device when the
CS/LD signal is low. The rising edge of CS/LD ends the
data transfer and causes the device to carry out the action
specifi ed in the 24-bit input word. The complete sequence
is shown in Figure 3.
The command (C3-C0) and address (A3-A0) assignments
are shown in Table 3. The fi rst four commands in the table
consist of write and update operations. A write operation
loads a 16-bit data word from the 32-bit shift register
into the input register of the selected DAC, n . An update
operation copies the data word from the input register to
the DAC register. Once copied into the DAC register, the
data word becomes the active 12-bit input code, and is
18
DD
V
OUT(IDEAL)
or an external reference.
= ( k/2
N
) V
REF
REF
is 1.5V, the internal
converted to an analog voltage at the DAC output. The
update operation also powers up the selected DAC if it had
been in power-down mode. The data path and registers
are shown in the Block Diagram.
While the minimum input word is 24-bits, it may optionally
be extended to 32-bits to accommodate microprocessors
which have a minimum word width of 16 bits (2 bytes). To
use the 32-bit word width, 8 don’t-care bits are transferred
to the device fi rst, followed by the 24-bit word as just
described. Figure 4 shows the 32-bit sequence.
Power-Down Mode
Either or both DAC channels can be put into power-down
mode by using command 0100b in combination with
the appropriate DAC address, n . The 16-bit data word is
ignored.
Normal operation can be resumed by executing any com-
mand which includes a DAC update, as shown in Table 3.
The selected DAC is powered up as its voltage output is
updated. If both DACs are powered down, then the main
bias generation circuit block has been automatically shut
down in addition to the individual DAC amplifi ers and
reference inputs. In this case, the power-up delay time is
700μs (for V
Table 3. Auxiliary DAC Commands
COMMAND*
ADDRESS ( n )*
*Command and address codes not shown are reserved and should not
be used.
C3
A3
0
0
0
0
0
1
0
0
1
C2
A2
0
0
0
0
1
1
0
0
1
CC
= 3V).
C1
A1
0
0
1
1
0
1
0
0
1
C0
A0
0
1
0
1
0
1
0
1
1
Write to Input Register n
Update (Power-Up) DAC Register n
Write to Input Register n , Update
(Power Up) All n
Write to and Update (Power-Up) n
Power Down n
No Operation
DAC A
DAC B
All DACs
9002f