MMA5224WR2 Freescale Semiconductor, MMA5224WR2 Datasheet - Page 18
![IC ACCELER 240G X-AXIS 16QFN](/photos/38/65/386548/qfn-16_sml.jpg)
MMA5224WR2
Manufacturer Part Number
MMA5224WR2
Description
IC ACCELER 240G X-AXIS 16QFN
Manufacturer
Freescale Semiconductor
Datasheet
1.MMA5206WR2.pdf
(63 pages)
Specifications of MMA5224WR2
Sensing Axis
X
Acceleration
240 g
Sensitivity
0.5 g/LSB
Package / Case
QFN-16
Supply Voltage (max)
25 V
Supply Current
4 mA to 8 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18
3.1.6
3.1.6.1
3.1.6.2
is required to clear the error.
3.1.6.3
has switched to normal mode.
3.1.6.4
device reset is required to clear the error.
3.1.6.5
3.1.6.6
MMA52xxWR
Address
The status check register is a read-only register containing device status information.
The test mode bit is cleared if the device is in test mode.
The internal data error bit is cleared if a register data CRC fault is detected in the user accessible OTP array. A device reset
The offset cancellation initialization status bit is set once the offset cancellation initialization process is complete, and the filter
The internal factory data error bit is cleared if a register data CRC fault is detected in the factory programmable OTP array. A
The offset error flag is cleared if the acceleration signal reaches the offset limit.
The temperature error flag is cleared if an over or under temperature condition exists.
$0C
Location
Status Check Register (SC)
Test Mode Flag (TM_B)
Internal Data Error Flag (IDEN_B)
Offset Cancellation Init Status Flag (OC_INIT_B)
Internal Factory Data Error Flag (IDEF_B)
Offset Error Flag (OFF_B)
Temperature Error Flag (TEMPF_B)
Register
SC
OC_INIT_B
0
1
7
0
TEMPF_B
IDEN_B
IDEF_B
OFF_B
0
1
0
1
0
1
0
1
TM_B
Offset Cancellation initialization complete (t
TM_B
6
0
1
RESERVED
Offset Cancellation in initialization
5
Over- or Under-Temperature error condition detected
CRC error in factory programmable OTP array
CRC error in user programmable OTP array
Error Condition
IDEN_B
4
Test Mode is not active
Offset error detected
Test Mode is active
No error detected
No error detected
No error detected
No error detected
Operating Mode
Error Condition
Error Condition
Error Condition
Error Condition
Bit
OC_INIT_B
OC1
3
and t
OC2
IDEF_B
expired)
2
Freescale Semiconductor
OFF_B
1
TEMPF_B
Sensors
0