MMA5224WR2 Freescale Semiconductor, MMA5224WR2 Datasheet - Page 4
![IC ACCELER 240G X-AXIS 16QFN](/photos/38/65/386548/qfn-16_sml.jpg)
MMA5224WR2
Manufacturer Part Number
MMA5224WR2
Description
IC ACCELER 240G X-AXIS 16QFN
Manufacturer
Freescale Semiconductor
Datasheet
1.MMA5206WR2.pdf
(63 pages)
Specifications of MMA5224WR2
Sensing Axis
X
Acceleration
240 g
Sensitivity
0.5 g/LSB
Package / Case
QFN-16
Supply Voltage (max)
25 V
Supply Current
4 mA to 8 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 1. Pin Description
4
1
MMA52xxWR
Pin
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
BUS_SW
Name
V
VSSA
VSSA
SCLK
TEST
I
D
V
PCM
V
PAD
V
DATA
Pin
V
V
D
REGA
CS
PIN CONNECTIONS
OUT
REG
BUF
CC
SS
SS
IN
Formal Name
Die Attach Pad
SPI Data Out
Analog GND
Analog GND
Digital GND
Digital GND
SPI Data In
Chip Select
Bus Switch
Gate Drive
Response
SPI Clock
Test Pin
Current
Supply
Output
Supply
Analog
Supply
Supply
Digital
Power
PCM
This pin is connected to the PSI5 power and data line through a resistor and supplies power to the device. An external capac-
This pin is the power supply return node for the digital circuitry.
This pin is connected to the PSI5 power and data line through a resistor and modulates the response current for PSI5 com-
This pin is the power supply return node for the digital circuitry.
This pin provides a 4 MHz PCM signal proportional to the acceleration data for test purposes. The output can be enabled via
This input pin provides the serial clock to the SPI port for test purposes. An internal pull-down device is connected to this pin.
This pin functions as the serial data output from the SPI port for test purposes. This pin must be left unconnected in the appli-
This pin functions as the serial data input to the SPI port for test purposes. An internal pull-down device is connected to this
This pin is connected to the power supply for the internal digital circuitry. An external capacitor must be connected between
This input pin provides the chip select to the SPI port for test purposes. An internal pull-up device is connected to this pin.This
This pin is connected to the power supply for the internal analog circuitry. An external capacitor must be connected between
This pin is the power supply return node for the analog circuitry.
This pin is connected to a buffer regulator for the internal circuitry. The buffer regulator supplies both the analog (V
This pin is must be grounded or left unconnected in the application.
This pin is the drive for a low side daisy chain switch. When daisy chain mode is enabled, this pin is connected to the gate of
This pin is the power supply return node for the analog circuitry.
This pin is the die attach flag, and is internally connected to VSS. Reference
itor must be connected between this pin and V
munication. Reference
OTP. Reference
This pin must be grounded or left unconnected in the application.
cation.
pin. This pin must be grounded or left unconnected in the application.
this pin and V
pin must be left unconnected in the application.
this pin and V
digital (V
between this pin and V
an n-channel FET which connects V
REG
) supplies to provide immunity from EMC and supply dropouts on V
SS
SSA
I
Figure 4. Top View, 16-Pin QFN Package
DATA
. Reference
V
V
V
Section
. Reference
CC
SS
SS
SS
Figure
3.5.3.7. If unused, this pin must be left unconnected.
. Reference
1
2
3
4
Figure
Figure
1.
16 15 14 13
5
17
1.
SS
1.
Figure
6
to V
SS_OUT.
7
1.
SS
. Reference
8
Reference
12
10
11
Definition
9
V
V
CS
V
Figure
Figure
SSA
REGA
REG
1.
1. If unused, this pin must be left unconnected.
Section 7
CC
. An external capacitor must be connected
for die attach pad connection details.
Freescale Semiconductor
REGA
Sensors
) and