CAT9534WI-GT2 CATALYST SEMICONDUCTOR, CAT9534WI-GT2 Datasheet - Page 6

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CAT9534WI-GT2

Manufacturer Part Number
CAT9534WI-GT2
Description
IC, I/O EXPANDER, 8BIT, 400KHZ, SOIC-16
Manufacturer
CATALYST SEMICONDUCTOR
Datasheet

Specifications of CAT9534WI-GT2

Chip Configuration
8 Bit
Bus Frequency
400kHz
Ic Interface Type
I2C, SMBus
No. Of I/o's
8
Supply Voltage Range
2.3V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CAT9534
PIN DESCRIPTION
SCL: Serial Clock
The serial clock input clocks all data transferred into
or out of the device. The SCL line requires a pull-up
resistor if it is driven by an open drain output.
SDA: Serial Data/Address
The bidirectional serial data/address pin is used to
transfer all data into and out of the device. The SDA
pin is an open drain output and can be wire-ORed
with other open drain or open collector outputs. A pull-
up resistor must be connected from SDA line to V
The value of the pull-up resistor, R
based on minimum and maximum values from Figure
2 and Figure 3 (see Note).
Note: According to the Fast Mode I²C bus specification, for bus capacitance up to 200pF, the pull up device can
be a resistor. For bus loads between 200pF and 400pF, the pull-up device can be a current source (Imax = 3mA)
or a switched resistor circuit.
Doc. No. MD-9004 Rev. D
Figure 2. Minimum R
2.5
1.5
0.5
2
1
0
2
2.4 2.8 3.2 3.6
I OL = 3mA @ V OLmax
Supply Voltage
V CC (V)
P
4
Value versus
P
4.4 4.8 5.2 5.6
, can be calculated
CC
.
6
A0, A1, A2: Device Address Inputs
These inputs are used for extended addressing
capability. The A0, A1, A2 pins should be hardwired to
V
may be addressed on a single bus system. The levels
on these inputs are compared with corresponding bits,
A2, A1, A0, from the slave address byte.
I/O
Any of these pins may be configured as input or
output. The simplified schematic of I/O
shown in Figure 4. When an I/O is configured as an
input, the Q1 and Q2 output transistors are off
creating a high impedance input. If the I/O pin is
configured as an output, the push-pull output stage is
enabled. Care should be taken if an external voltage
is applied to an I/O pin configured as an output due to
the low impedance paths that exist between the pin
and either V
CC
0
to I/O
or V
8.00
7.00
6.00
5.00
4.00
3.00
2.00
1.00
0.00
Figure 3. Maximum R
SS
7
: Input / Output Ports
. When hardwired, up to eight CAT9534s
CC
50
Fast Mode I²C Bus / tr max - 300ns
or V
100
Bus Capacitance
SS
.
150
C BUS (pF)
Characteristics subject to change without notice
200
P
250
Value versus
© 2010 SCILLC. All rights reserved
300
350
0
to I/O
400
7
is

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