GS2971-IBE3 GENNUM, GS2971-IBE3 Datasheet - Page 2

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GS2971-IBE3

Manufacturer Part Number
GS2971-IBE3
Description
DESERIALIZER, 3G/HD/SD/ASI, 100BGA
Manufacturer
GENNUM
Datasheet

Specifications of GS2971-IBE3

Supply Voltage Range
1.14V To 1.26V
Operating Temperature Range
-20°C To +85°C
Digital Ic Case Style
BGA
No. Of Pins
100

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GS2971-IBE3
Manufacturer:
GENNUM
Quantity:
20 000
Description
The GS2971 is a multi-rate SDI integrated Receiver which
includes complete SMPTE processing, as per SMPTE 425M,
292M and SMPTE 259M-C. The SMPTE processing features
can be bypassed to support signals with other coding
schemes.
The GS2971 integrates Gennum's next-generation
state-of-the-art adaptive cable equalizer technology,
achieving unprecedented cable lengths and jitter tolerance.
It features DC restoration to compensate for the DC content
of SMPTE pathological signals.
GS2971 3Gb/s, HD, SD SDI Receiver, with Integrated
Adaptive Cable Equalizer
Product Brief
51914 - E
Analog
Sync
SD/HD/3G-SDI
Seperator
Application: Multi-format Audio De-embedder Module
Sync
SD/HD/3G-SDI
3G-SDI
Input 1
Input 2
Input n
3G-SDI
3G-SDI
Application: Multi-input Video Monitoring System
Application: Multi-format Digital VTR/Video Server
GS4911
GS2971
GS2971
GS2971
June 2009
10-bit
HV F/PCLK
10-bit
AE S BUS
HV F/PCLK
HV F/PCLK
10-bit
GS2971
GS2971
Memory
Video
Audio
Select
HV F/PCLK
Audio Clocks
Audio Clocks
HV F /P CLK
AUDIO 1/ 2
AUDIO 3/ 4
AUDIO 5/ 6
AUDIO 7/ 8
10-bit
Audio Clocks
AUDIO 1/ 2
AUDIO 3/ 4
AUDIO 5/ 6
AUDIO 7/ 8
10-bit
P CLK
Processor
Processor
Audio Outputs
Drivers
V ideo Output
Switch
Logic
Video
Audio
GS2962
&
Generator
Formatter
On Screen
Processor
Display
Video
Audio
DAC
HV/DE/PCLK
AE S OUT 1/2
AE S OUT 3/4
AE S OUT 5/6
AE S OUT 7/8
Tape/HDD/Solid State
SD/HD/3G-SDI
Storage:
AES
Audio
Outputs
Analog
Audio
Outputs
VGA DAC
DVI/
Output
Video
The device features an Integrated Reclocker with an
internal VCO and a wide Input Jitter Tolerance (IJT) of 0.7UI.
A serial digital loop through output is provided, which can
be configured to output either reclocked or non-reclocked
serial digital data. The Serial Digital Output can be
connected to an external Cable Driver.
The device operates in one of four basic modes: SMPTE
mode, DVB-ASI mode, Data-Through mode or Standby
mode.
In SMPTE mode, the GS2971 performs SMPTE
de-scrambling and NRZI to NRZ decoding and word
alignment. Line-based CRC errors, line number errors, TRS
errors and ancillary data check sum errors can all be
detected. The GS2971 also provides ancillary data
extraction. The entire ancillary data packet is extracted,
and written to host-accessible registers. Other processing
functions include H:V:F timing extraction, Luma and
Chroma ancillary data indication, video standard detection,
and SMPTE 352M packet detection and decoding. All of the
processing features are optional, and may be enabled or
disabled via the Host Interface.
Both SMPTE 425M Level A and Level B inputs are
supported. The GS2971 also provides user-selectable
conversion from Level B to Level A for 1080p 50/60 4:2:2
10-bit formats only.
In DVB-ASI mode, 8b/10b decoding is applied to the
received data stream.
In Data-Through mode, all forms of SMPTE and DVB-ASI
decoding are disabled, and the device can be used as a
simple serial to parallel converter.
The device can also be placed in a lower power Standby
mode. In this mode, no signal processing is carried out and
the parallel output is held static. Placing the Receiver in
Standby mode will automatically place the integrated
equalizer in power down mode as well.
Parallel data outputs are provided in 20-bit or 10-bit
multiplexed format for 3Gb/s, HD and SD video rates. For
1080p 50/60 4:2:2 10-bit, the parallel data is output on the
20-bit parallel bus as Y on 10 bits and Cb/Cr on the other 10
bits. As such, this parallel bus can interface directly with
video processor ICs. For other SMPTE 425M mapping
structures, the video data is mapped to a 20-bit virtual
interface as described in SMPTE 425M. In all cases this
20-bit parallel bus can be multiplexed onto 10 bits for a low
pin count interface with downstream devices. The
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