EPM7256AEFC256-10N Altera, EPM7256AEFC256-10N Datasheet - Page 33
![IC PLD EEPROM 256 MACROCELL FBGA-256](/photos/37/12/371228/544-256-fbga_sml.jpg)
EPM7256AEFC256-10N
Manufacturer Part Number
EPM7256AEFC256-10N
Description
IC PLD EEPROM 256 MACROCELL FBGA-256
Manufacturer
Altera
Series
MAX 7000AEr
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7256AEFC256-10N
Cpld Type
EEPROM
No. Of Macrocells
256
No. Of I/o's
164
Propagation Delay
10ns
Global Clock Setup Time
3.9ns
Frequency
172.4MHz
Supply Voltage Range
3V To 3.6V
Family Name
MAX 7000A
Memory Type
EEPROM
# Macrocells
256
Number Of Usable Gates
5000
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
16
# I/os (max)
164
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7256AEFC256-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
Figure 12. MAX 7000A Switching Waveforms
t
driven at 3 V for a logic
high and 0 V for a logic
low. All timing
characteristics are
measured at 1.5 V.
R
& t
F
< 2 ns. Inputs are
(Logic Array Output)
Parallel Expander
Shared Expander
Register Output
Input or I/O Pin
Register to PIA
Data or Enable
Clock into PIA
to Logic Array
Global Clock
Logic Array
Logic Array
Logic Array
Logic Array
Output Pin
at Register
PIA Delay
Clock into
Data from
Clock Pin
Input Pin
Register
Clock at
I/O Pin
Output
Global
Delay
Delay
to Pin
Input
Combinatorial Mode
Global Clock Mode
Array Clock Mode
t
t
R
R
t
t
IN
t
t
SU
IN
IO
t
MAX 7000A Programmable Logic Device Data Sheet
t
ACH
CH
t
t
H
t
t
t
GLOB
PIA
IN
IO
t
RD
t
t
IC
SU
t
PIA
t
t
ACL
t
CL
SEXP
t
H
t
PIA
t
OD
t
LAC
, t
LAD
t
PEXP
t
t
F
F
t
COMB
t
CLR
, t
PRE
t
OD
t
OD
t
PIA
33