EPM7256AEFC256-10N Altera, EPM7256AEFC256-10N Datasheet - Page 4
![IC PLD EEPROM 256 MACROCELL FBGA-256](/photos/37/12/371228/544-256-fbga_sml.jpg)
EPM7256AEFC256-10N
Manufacturer Part Number
EPM7256AEFC256-10N
Description
IC PLD EEPROM 256 MACROCELL FBGA-256
Manufacturer
Altera
Series
MAX 7000AEr
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7256AEFC256-10N
Cpld Type
EEPROM
No. Of Macrocells
256
No. Of I/o's
164
Propagation Delay
10ns
Global Clock Setup Time
3.9ns
Frequency
172.4MHz
Supply Voltage Range
3V To 3.6V
Family Name
MAX 7000A
Memory Type
EEPROM
# Macrocells
256
Number Of Usable Gates
5000
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
16
# I/os (max)
164
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7256AEFC256-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
(3)
4
Table 3. MAX 7000A Maximum User I/O Pins
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
Table 4. MAX 7000A Maximum User I/O Pins
EPM7032AE
EPM7064AE
EPM7128A
EPM7128AE
EPM7256A
EPM7256AE
EPM7512AE
When the IEEE Std. 1149.1 (JTAG) interface is used for in-system programming or boundary-scan testing, four I/O
pins become JTAG pins.
All Ultra FineLine BGA packages are footprint-compatible via the SameFrame
design a board to support a variety of devices, providing a flexible migration path across densities and pin counts.
Device migration is fully supported by Altera development tools. See
details.
All FineLine BGA packages are footprint-compatible via the SameFrame feature. Therefore, designers can design a
board to support a variety of devices, providing a flexible migration path across densities and pin counts. Device
migration is fully supported by Altera development tools. See
Device
Device
44-Pin PLCC 44-Pin TQFP 49-Pin Ultra
144-Pin TQFP
36
36
100
100
120
120
120
The MAX 7000A architecture supports 100% transistor-to-transistor logic
(TTL) emulation and high-density integration of SSI, MSI, and LSI logic
functions. It easily integrates multiple devices including PALs, GALs, and
22V10s devices. MAX 7000A devices are available in a wide range of
packages, including PLCC, BGA, FineLine BGA, Ultra FineLine BGA,
PQFP, and TQFP packages. See
FineLine BGA
169-Pin Ultra
36
36
100
Note (1)
Note (1)
FineLine
BGA
(2)
41
(2)
208-Pin PQFP 256-Pin BGA
“SameFrame Pin-Outs” on page 15
164
164
176
Table 3
84-Pin PLCC
“SameFrame Pin-Outs” on page 15
68
68
and
TM
Table
feature. Therefore, designers can
212
100-Pin
4.
TQFP
68
84
84
84
84
Altera Corporation
256-Pin FineLine
for more details.
BGA
FineLine
100
100
164
164
212
100-Pin
BGA
(3)
68
84
84
84
for more
(3)