PIC12F1822-I/MF Microchip Technology, PIC12F1822-I/MF Datasheet - Page 211

• Manufacturer Part Number: PIC12F1822-I/MF
• Description: IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1822-I/MF

• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Core Size: 8 Bit
• Program Memory Size: 3.5KB
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.3.6
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCP1
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
24.3.7
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 5.0 “Oscillator Module (With Fail-Safe
Clock Monitor)”
24.3.8
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
TABLE 24-8:
 2010 Microchip Technology Inc.
APFCON
CCP1CON
CCPR1L
INTCON
PIE1
PIR1
PR2
T2CON
TMR2
TRISA
TRISC
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
Note 1:
Name
(1)
*
Page provides register information.
PIC16F/LF1823 only.
OPERATION IN SLEEP MODE
CHANGES IN SYSTEM CLOCK
FREQUENCY
EFFECTS OF RESET
Capture/Compare/PWM Register x Low Byte (LSB)
Timer2 Period Register
Timer2 Module Register
RXDTSEL
TMR1GIE
TMR1GIF
Bit 7
GIE
for additional details.
—
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
P1M<1:0>
SDOSEL
PEIE
ADIE
ADIF
Bit 6
—
—
PIC12F/LF1822/PIC16F/LF1823
TMR0IE
TRISC5
TRISA5
SSSEL
RCIE
RCIF
Bit 5
T2OUTPS<3:0>
DC1B<1:0>
TRISA4
TRISC4
Preliminary
INTE
TXIE
Bit 4
TXIF
—
T1GSEL
SSP1IE
SSP1IF
TRISA3
TRISC3
IOCIE
24.3.9
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register, APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see
more information.
Bit 3
TXCKSEL
TMR2ON
TMR0IF
CCP1IE
CCP1IF
TRISA2
TRISC2
Section 12.1 “Alternate Pin Function”
ALTERNATE PIN LOCATIONS
Bit 2
CCP1M<3:0>
P1BSEL
TMR2IE
TMR2IF
TRISC1
TRISA1
INTF
Bit 1
T2CKPS<:0>1
CCP1SEL
TMR1IE
TMR1IF
TRISA0
TRISC0
IOCIF
Bit 0
DS41413B-page 211
Register
on Page
188*
188*
121
226
204
190
124
128
91
92
94
for