PIC18F452I/L Microchip Technology, PIC18F452I/L Datasheet - Page 198

• Manufacturer Part Number: PIC18F452I/L
• Description: IC, 8BIT MCU, PIC18F, 40MHZ, LCC-44
• Manufacturer: Microchip Technology

Specifications of PIC18F452I/L

• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 16 KWords
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX2
TABLE 19-1:
REGISTER 19-1:
DS39564C-page 196
300001h
300002h
300003h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh
3FFFFFh
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition.
Note 1: See Register 19-12 for DEVID1 values.
File Name
Shaded cells are unimplemented, read as ‘0’.
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3H
CONFIG4L
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
DEVID1
DEVID2
bit 7-6
bit 5
bit 4-3
bit 2-0
CONFIGURATION BITS AND DEVICE IDS
CONFIGURATION REGISTER 1 HIGH (CONFIG1H: BYTE ADDRESS 300001h)
Unimplemented: Read as ‘0’
OSCSEN: Oscillator System Clock Switch Enable bit
1 = Oscillator system clock switch option is disabled (main oscillator is source)
0 = Oscillator system clock switch option is enabled (oscillator switching is enabled)
Unimplemented: Read as ‘0’
FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator w/ OSC2 configured as RA6
110 = HS oscillator with PLL enabled/Clock frequency = (4 x F
101 = EC oscillator w/ OSC2 configured as RA6
100 = EC oscillator w/ OSC2 configured as divide-by-4 clock output
011 = RC oscillator
010 = HS oscillator
001 = XT oscillator
000 = LP oscillator
Legend:
R = Readable bit
- n = Value when device is unprogrammed
bit 7
DEBUG
DEV10
WRTD
DEV2
Bit 7
CPD
—
—
—
—
—
—
—
—
U-0
—
EBTRB
WRTB
DEV1
DEV9
Bit 6
CPB
—
—
—
—
—
—
—
—
U-0
—
OSCSEN
WRTC
DEV0
DEV8
Bit 5
—
—
—
—
—
—
—
—
—
P = Programmable bit
OSCSEN
R/P-1
REV4
DEV7
Bit 4
—
—
—
—
—
—
—
—
—
—
—
WDTPS2
BORV1
EBTR3
WRT3
REV3
DEV6
Bit 3
CP3
—
—
—
—
—
—
U-0
—
WDTPS1
FOSC2
BORV0
EBTR2
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
WRT2
REV2
DEV5
Bit 2
CP2
LVP
—
—
—
—
U-0
—
WDTPS0
BOREN
FOSC1
EBTR1
WRT1
REV1
DEV4
Bit 1
CP1
—
—
—
—
—
OSC
FOSC2
© 2006 Microchip Technology Inc.
R/P-1
)
PWRTEN
CCP2MX
STVREN
WDTEN
FOSC0
EBTR0
WRT0
REV0
DEV3
Bit 0
CP0
—
—
—
FOSC1
R/P-1
Unprogrammed
--1- -111
---- 1111
---- 1111
---- ---1
1--- -1-1
---- 1111
11-- ----
---- 1111
111- ----
---- 1111
-1-- ----
0000 0100
Default/
Value
FOSC0
(1)
R/P-1
bit 0