PIC18F452I/L Microchip Technology, PIC18F452I/L Datasheet - Page 79

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PIC18F452I/L

Manufacturer Part Number
PIC18F452I/L
Description
IC, 8BIT MCU, PIC18F, 40MHZ, LCC-44
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC18F452I/L

Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Core Size
8 Bit
Program Memory Size
16 KWords
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 8-3:
© 2006 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON3 REGISTER
bit 7
INT2IP: INT2 External Interrupt Priority bit
1 = High priority
0 = Low priority
INT1IP: INT1 External Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as '0'
INT2IE: INT2 External Interrupt Enable bit
1 = Enables the INT2 external interrupt
0 = Disables the INT2 external interrupt
INT1IE: INT1 External Interrupt Enable bit
1 = Enables the INT1 external interrupt
0 = Disables the INT1 external interrupt
Unimplemented: Read as '0'
INT2IF: INT2 External Interrupt Flag bit
1 = The INT2 external interrupt occurred (must be cleared in software)
0 = The INT2 external interrupt did not occur
INT1IF: INT1 External Interrupt Flag bit
1 = The INT1 external interrupt occurred (must be cleared in software)
0 = The INT1 external interrupt did not occur
Legend:
R = Readable bit
- n = Value at POR
Note:
INT2IP
R/W-1
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global enable bit. User software should ensure
the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature
allows for software polling.
INT1IP
R/W-1
U-0
W = Writable bit
’1’ = Bit is set
INT2IE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
INT1IE
R/W-0
U-0
PIC18FXX2
x = Bit is unknown
INT2IF
R/W-0
DS39564C-page 77
INT1IF
R/W-0
bit 0

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