PIC24FJ256GA106-I/MR Microchip Technology, PIC24FJ256GA106-I/MR Datasheet - Page 128
![IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24FJ256GA106-I/MR
Manufacturer Part Number
PIC24FJ256GA106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GB110-IPF.pdf
(292 pages)
Specifications of PIC24FJ256GA106-I/MR
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC24FJ128GA008-IPT PDF datasheet
- PIC24FJ128GA106-IPT PDF datasheet #2
- PIC24FJ128GA106-IPT PDF datasheet #3
- PIC24FJ128GA106-IPT PDF datasheet #4
- PIC24FJ256GA106-IPT PDF datasheet #5
- PIC24FJ128GB110-IPF PDF datasheet #6
- Current page: 128 of 330
- Download datasheet (3Mb)
PIC24FJ256GA110 FAMILY
10.1.1
In addition to the PORT, LAT and TRIS registers for
data control, each port pin can also be individually con-
figured for either digital or open-drain output. This is
controlled by the Open-Drain Control register, ODCx,
associated with each port. Setting any of the bits con-
figures the corresponding pin to act as an open-drain
output.
The open-drain feature allows the generation of
outputs higher than V
digital only pins by using external pull-up resistors. The
maximum open-drain voltage allowed is the same as
the maximum V
10.2
The AD1PCFGL and TRIS registers control the opera-
tion of the A/D port pins. Setting a port pin as an analog
input also requires that the corresponding TRIS bit be
set. If the TRIS bit is cleared (output), the digital output
level (V
When reading the PORT register, all pins configured as
analog input channels will read as cleared (a low level).
Pins configured as digital inputs will not convert an
analog input. Analog levels on any pin that is defined as
a digital input (including the ANx pins) may cause the
input buffer to consume current that exceeds the
device specifications.
10.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically, this instruction
would be a NOP.
EXAMPLE 10-1:
DS39905E-page 128
MOV
MOV
NOP
BTSS
OH
0xFF00, W0
W0, TRISB
PORTB, #13
Configuring Analog Port Pins
or V
OPEN-DRAIN CONFIGURATION
I/O PORT WRITE/READ TIMING
OL
IH
) will be converted.
specification.
PORT WRITE/READ EXAMPLE
DD
(e.g., 5V) on any desired
; Configure PORTB<15:8> as inputs
; and PORTB<7:0> as outputs
; Delay 1 cycle
; Next Instruction
10.2.2
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are used
as digital only inputs are able to handle DC voltages up
to 5.5V, a level typical for digital logic circuits. In contrast,
pins that also have analog input functions of any kind
can only tolerate voltages up to V
beyond V
Table 10-1
Section 28.1 “DC Characteristics”
TABLE 10-1:
PORTA<10:9>
PORTB<15:0>
PORTC<15:12>
PORTD<7:6>
PORTF<0>
PORTG<9:6>
PORTA<15:14>,
PORTA<7:0>
PORTC<4:1>
PORTD<15:8>,
PORTD<5:0>
PORTE<9:0>
PORTF<13:12>,
PORTF<8:1>
PORTG<15:12>,
PORTG<3:0>
Note 1:
Note:
Port or Pin
DD
summarizes the input capabilities. Refer to
Not all port pins shown here are imple-
mented on 64-pin and 80-pin devices.
Refer to
to confirm which ports are available in
specific devices.
ANALOG INPUT PINS AND
VOLTAGE CONSIDERATIONS
For easy identification, the pin diagrams at
the beginning of this data sheet also
indicate 5.5V tolerant pins with dark grey
shading.
on these pins are always to be avoided.
INPUT VOLTAGE LEVELS
Section 1.0 “Device Overview”
Tolerated
2010 Microchip Technology Inc.
Input
5.5V
V
DD
DD
. Voltage excursions
for more details.
Only V
levels tolerated.
Tolerates input
levels above
V
most standard
logic.
DD
Description
, useful for
DD
input
(1)
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