PIC24FJ256GA106-I/MR Microchip Technology, PIC24FJ256GA106-I/MR Datasheet - Page 159
![IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64](/photos/12/13/121325/c04-149_mr_sml.jpg)
PIC24FJ256GA106-I/MR
Manufacturer Part Number
PIC24FJ256GA106-I/MR
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-64
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GB110-IPF.pdf
(292 pages)
Specifications of PIC24FJ256GA106-I/MR
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Core Size
16 Bit
Program Memory Size
256KB
Peripherals
ADC, Comparator, PWM, RTC, Timer
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
52
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC24FJ128GA008-IPT PDF datasheet
- PIC24FJ128GA106-IPT PDF datasheet #2
- PIC24FJ128GA106-IPT PDF datasheet #3
- PIC24FJ128GA106-IPT PDF datasheet #4
- PIC24FJ256GA106-IPT PDF datasheet #5
- PIC24FJ128GB110-IPF PDF datasheet #6
- Current page: 159 of 330
- Download datasheet (3Mb)
FIGURE 12-2:
FIGURE 12-3:
2010 Microchip Technology Inc.
Note 1:
Note 1:
Set T2IF (T4IF)
Set T3IF (T5IF)
ADC Event Trigger
2:
(T5CK)
(T4CK)
T3CK
T2CK
The Timer clock input must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral
Pin Select” for more information.
The Timer clock input must be assigned to an available RPn pin before use. Please see Section 10.4 “Peripheral
Pin Select” for more information.
The ADC event trigger is available only on Timer3.
TIMER2 AND TIMER4 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
TIMER3 AND TIMER5 (16-BIT ASYNCHRONOUS) BLOCK DIAGRAM
TGATE
(2)
TGATE
1
0
1
0
Reset
Reset
Equal
Equal
TMR2 (TMR4)
TMR3 (TMR5)
Comparator
Comparator
PR2 (PR4)
PR3 (PR5)
PIC24FJ256GA110 FAMILY
Q
Q
Sync
Q
Q
Gate
Sync
CK
CK
D
D
T
T
CY
CY
1x
01
00
Sync
1x
00
01
TON
TON
TCS
TGATE
TCS
TGATE
(1)
(1)
(1)
(1)
TCKPS<1:0>
1, 8, 64, 256
TCKPS<1:0>
1, 8, 64, 256
Prescaler
Prescaler
2
DS39905E-page 159
2
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