PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 212
PIC24FJ64GB004-I/ML
Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(48 pages)
2.PIC24FJ32GB002-ISO.pdf
(352 pages)
3.PIC24FJ32GB002-ISO.pdf
(12 pages)
4.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB004-I/ML
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GB002-ISO PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- Current page: 212 of 352
- Download datasheet (3Mb)
PIC24FJ64GB004 FAMILY
18.7
There are a total of 37 memory mapped registers asso-
ciated with the USB OTG module. They can be divided
into four general categories:
• USB OTG Module Control (12)
• USB Interrupt (7)
• USB Endpoint Management (16)
• USB V
This total does not include the (up to) 128 BD registers
in
Register 18-1 and Register 18-2, are shown separately
in Section 18.2 “USB Buffer Descriptors and the
BDT”.
With the exception U1PWMCON and U1PWMRRS, all
USB OTG registers are implemented in the Least Sig-
nificant Byte of the register. Bits in the upper byte are
unimplemented, and have no function. Note that some
registers are instantiated only in Host mode, while
other registers have different bit instantiations and
functions in Device and Host modes.
DS39940D-page 212
the
USB OTG Module Registers
BUS
BDT.
Power Control (2)
Their
prototypes,
described
in
Registers described in the following sections are those
that have bits with specific control and configuration
features. The following registers are used for data or
address values only:
• U1BDTP1: Specifies the 256-word page in data
• U1FRML and U1FRMH: Contains the 11-bit byte
• U1PWMRRS: Contains the 8-bit value for PWM
RAM used for the BDT; 8-bit value with bit 0 fixed
as ‘0’ for boundary alignment
counter for the current data frame
duty cycle (bits<15:8>) and PWM period
(bits<7:0>) for the V
module.
BUS
2010 Microchip Technology Inc.
boost assist PWM
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