AU80610004653AAS LBMG Intel, AU80610004653AAS LBMG Datasheet - Page 87
AU80610004653AAS LBMG
Manufacturer Part Number
AU80610004653AAS LBMG
Description
MPU, ATOM PROCESSOR, N450, FC-BGA8
Manufacturer
Intel
Series
ATOM - N400r
Datasheet
1.AU80610004653AAS_LBMG.pdf
(171 pages)
Specifications of AU80610004653AAS LBMG
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Processor Configuration Registers
Datasheet
21:20
19:18
17:16
15:14
Bit
24
23
22
Access
RW
RW
RW
RW
RW
RW
RW
Default
Value
00b
00b
00b
00b
0b
0b
0b
RST/PWR
Core
Core
Core
Core
Core
Core
Core
All Rank Refresh (ALLRKREF):
This configuration bit enables (by default) that all the
ranks are refreshed in a staggered/atomic fashion. If set,
the ranks are refreshed in an independent fashion.
Refresh Enable (REFEN):
Refresh is enabled.
DDR Initialization Done (INITDONE):
Indicates that DDR initialization is complete.
DRAM Refresh Hysteresis (REFHYSTERISIS):
Hysteresis level - Useful for dref_high watermark cases.
The dref_high flag is set when the dref_high watermark
level is exceeded, and is cleared when the refresh count
is less than the hysteresis level. This bit should be set to
a value less than the high watermark level.
DRAM Refresh Panic Watermark (REFPANICWM):
When the refresh count exceeds this level, a refresh
request is launched to the scheduler and the dref_panic
flag is set.
DRAM Refresh High Watermark (REFHIGHWM):
When the refresh count exceeds this level, a refresh
request is launched to the scheduler and the dref_high
flag is set.
DRAM Refresh Low Watermark (REFLOWWM):
When the refresh count exceeds this level, a refresh
request is launched to the scheduler and the dref_low
flag is set.
0: Disabled
1: Enabled
00: 3
01: 4
10: 5
11: 6
00: 5
01: 6
10: 7
11: 8
00: 3
01: 4
10: 5
11: 6
00: 1
01: 2
10: 3
11: 4
Description
87
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