LM2743MTC National Semiconductor, LM2743MTC Datasheet - Page 13

• Manufacturer Part Number: LM2743MTC
• Description: SYNC SW CONTROL, 3V:6V, POWERWISE
• Manufacturer: National Semiconductor

Specifications of LM2743MTC

• Primary Input Voltage: 16V
• No. Of Outputs: 1
• Output Voltage: 13.5V
• Output Current: 20A
• Voltage Regulator Case Style: TSSOP
• No. Of Pins: 14
• Operating Temperature Range: -40°C To +125°C
• Svhc: No SVHC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Application Information
At an input voltage of 3V both, the high and low, side FETs
are driven with about 4.5V.
The decision on which configuration to use depends on the
desired output current and operating frequency. At high cur-
rents and low frequencies, configuration 3 (Figure 11) is
recommended. For low currents and high frequencies, con-
figuration 1 (Figure 9) may work well.
POWER GOOD SIGNAL
The power good signal is the OR-gated flag representing
over-voltage and under-voltage conditions. If the feedback
pin (FB) voltage is about 18% over its nominal value (V
TH-HI
(V
about 118% of V
and turns on the low side gate. However, at about 70% of
V
and low sides are still switching. The power good flag will
return to logic high whenever the feedback pin voltage is
between 70% and 118% of 0.6V.
UVLO
The 2.76V turn-on threshold on V
of 400mV. Therefore, if V
enters UVLO mode. UVLO consists of turning off the top and
bottom FETs, and remaining in that condition until V
above 2.76V. As with shutdown, the soft start capacitor is
discharged through a FET, ensuring that the next start-up will
be smooth.
CURRENT LIMIT
Current limit is realized by sensing the voltage across the
low side FET while it is on. The R
known value, and the voltage across the FET can be found
from:
The current limit is determined by an external resistor, R
connected between the switch node and the I
constant current of 40µA is forced through R
fixed voltage drop. This fixed voltage is compared against
FB
PWGD-TH-LO
the converter goes to maximum duty cycle and the high
= 0.710V) or falls about 30% below its nominal value
FIGURE 11. Bootstrap Configuration 3
= 0.434V) the power good flag goes low. At
FB
the converter turns off the high side gate
V
DS
= I
CC
DS
drops below 2.42V, the chip
* R
CC
DS(ON)
DS(ON)
has a built in hysteresis
(Continued)
of the FET is a
CS
20095219
, causing a
SEN
CC
pin. A
PWGD-
rises
CS
,
13
V
been reached. The R
where resistance R
datasheet (R
value is calculated from equation.
where: L is the inductance and F
Because current sensing is done across the low side FET, no
minimum high side on-time is necessary. In the current limit
mode the LM2743 will turn the high side off and the keep low
side on for a time as long as necessary. The chip also
discharges the soft start capacitor through a fixed 90µA
source. This way, smooth ramping up of the output voltage
as with a normal soft start is ensured. The output of the
LM2743 internal error amplifier is limited by the voltage on
the soft start capacitor. Hence, discharging the soft start
capacitor reduces the maximum duty cycle (D) of the con-
troller. During severe current limit, this reduction in duty cycle
will reduce the output voltage if the current limit conditions
last for an extended period of time.
UVF/OVF
The output under-voltage flag (UVF) and over-voltage flag
(OVF) mechanisms engage at about 70% and 118% of the
target output voltage, respectively. In the UVF case, the
LM2743 will turn off the high side switch and turn on the low
side switch and dischrage the soft start capacitor through the
MOSFET switch. However, in the OVF the converter goes to
maximum duty cycle and the high and low sides are still
switching. The chip remains in this state until the shutdown
pin has been pulled to a logic low and then released. The
UVF function is masked only during the initial charge of the
soft start capacitor, when voltage is first applied to the V
pin. The power good flag goes low during this time, giving a
logic-level warning signal.
SHUT DOWN
To assure proper IC start-up, shutdown pin (SD) should not
be left floating. For Normal Operation this pin should be
connected to V
Characteristics table).
If the shutdown pin SD is pulled low, the LM2743 discharges
the soft start capacitor through a MOSFET switch. The high
and the low side switches are turned off. The LM2743 re-
mains in this state until SD is released.
DESIGN CONSIDERATIONS
The following is a design procedure for all the components
needed to create the Typical Application Circuit. The de-
signed 3.3V (V
delivering 4A with an efficiency of 89% at switching fre-
quency of 300kHz. The same procedures can be followed to
create many other designs with varies input and output
voltages, and load current.
DS
and if the latter is higher, the current limit of the chip has
DS(ON LOW)
CC
CC
) to 1.2V (V
or other low voltage source (see Electrical
CS
DS(ON)
can be found by using the following:
=13mΩ) and current limit (I
OUT
is taken from MOSFET’s
OSC
) converter is capable of
is the PWM frequency.
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LIM
CC
)