LM2743MTC National Semiconductor, LM2743MTC Datasheet - Page 2

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LM2743MTC

Manufacturer Part Number
LM2743MTC
Description
SYNC SW CONTROL, 3V:6V, POWERWISE
Manufacturer
National Semiconductor
Datasheet

Specifications of LM2743MTC

Primary Input Voltage
16V
No. Of Outputs
1
Output Voltage
13.5V
Output Current
20A
Voltage Regulator Case Style
TSSOP
No. Of Pins
14
Operating Temperature Range
-40°C To +125°C
Svhc
No SVHC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Connection Diagram
Pin Description
BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate
drive. The voltage should be at least one gate threshold
(V
turn on the high-side FET.
LG (Pin 2) - Gate drive for the low-side N-channel MOSFET.
This signal is interlocked with HG (Pin 14) to avoid a shoot-
through problem.
PGND (Pins 3, 13) - Ground for low-side FET drive circuitry.
Connect to system ground.
SGND (Pin 4) - Ground for signal level circuitry. Connect to
system ground.
V
PWGD (Pin 6) - Power good pin. This is an open drain
output. The pin is pulled low when the chip is in under-
voltage flag (UVF), over-voltage flag (OVF), or UVLO mode.
During normal operation, this pin is connected to V
other low voltage source through a pull-up resistor (R
UP
I
fixed 40µA current. A resistor of appropriate value should be
connected between this pin and the drain of the low-side
FET.
EAO (Pin 8) - Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
SEN
CC
GS(th)
).
(Pin 5) Supply rail for the controller.
(Pin 7) - Current limit threshold setting. This sources a
) above the regulator input voltage (V
IN
) to properly
NS Package Number MTC14
14-Lead Plastic TSSOP
CC
PULL-
θ
JA
or
= 155˚C/W
2
SS (Pin 9) - Soft start and track pin. A 10 µA current is
sourced from this pin. This pin is connected to the non-
inverting input of the error amplifier during soft start, or any
time the voltage is below the reference. To track power
supplies connect a resistor divider (smaller than 10kΩ for
better precision) from the output of the master supply directly
to the SS pin. To limit the inrush current of a single power
supply, place a capacitor to ground (see Application
Information/Start Up for appropriate capacitance value). This
pin should not be forced before SD or V
UVLO).
FB (Pin 10) - This is the inverting input of the error amplifier,
which is used for sensing the output voltage and compen-
sating the control loop. The FB current is negligible.
FREQ (Pin 11) - The switching frequency (F
connecting a resistor (R
SD (Pin 12) - IC shutdown pin. To assure proper IC start-up
the SD pin should not be left floating. When this pin is pulled
low the chip turns both, high and low, sides off. While this pin
is low, the IC will not start up. This pin features a precision
threshold for power supply sequencing, as well as a lower
threshold to ensure minimal quiescent current.
HG (Pin 14) - Gate drive for the high-side N-channel MOS-
FET. This signal is interlocked with LG (Pin 2) to avoid a
shoot-through problem.
20095202
FADJ
) between this pin and ground.
CC
OSC
(above the
) is set by

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