AD7719BRUZ Analog Devices Inc, AD7719BRUZ Datasheet
AD7719BRUZ
Specifications of AD7719BRUZ
Related parts for AD7719BRUZ
AD7719BRUZ Summary of contents
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FEATURES HIGH RESOLUTION - ADCs 2 Independent ADCs (16- and 24-Bit Resolution) Factory-Calibrated (Field Calibration Not Required) Output Settles in 1 Conversion Cycle (Single Conversion Mode) Programmable Gain Front End Simultaneous Sampling and Conversion of 2 Signal Sources Separate ...
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AD7719 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 ...
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AD7719 –SPECIFICATIONS REFIN(+) = 2.5 V; REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768 kHz Crystal; all specifications T Parameter ADC CHANNEL SPECIFICATION Output Update Rate MAIN CHANNEL 2 No Missing Codes Resolution Output Noise and ...
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AD7719 Parameter AUXILIARY CHANNEL (continued) 3 Offset Error 4 Offset Error Drift vs. Temperature 6, 7 Full-Scale Error 4 Gain Drift vs. Temperature Negative Full-Scale Error Power Supply Rejection (PSR) ANALOG INPUTS Differential Input Voltage Ranges Absolute AIN Voltage Limits ...
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Parameter LOGIC INPUTS 2 All Inputs Except SCLK and XTAL1 V , Input Low Voltage INL V , Input High Voltage INH SCLK Only (Schmitt-Triggered Input) V T(+) V T(–) V – V T(+) T(–) V T(+) V T(–) V ...
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AD7719 Parameter Power Supply Currents (Continued) AI Current (Main ADC Current (Aux ADC Current (Main and Aux ADC (ADC Disable Mode (ADC Disable Mode (Power-Down Mode (Power-Down ...
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TIMING CHARACTERISTICS AGND = DGND = 32.768 kHz; Input Logic Logic TAL Limit at T Parameter (B Version) t 32.768 Read Operation ...
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AD7719 DIGITAL INTERFACE As previously outlined, the AD7719’s programmable functions are controlled using a set of on-chip registers. Data is written to these registers via the part’s serial interface; read access to the on-chip registers is also provided by this ...
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The serial interface can be reset by exercising the RESET input on the part. It can also be reset by writing a series the DIN input logic 1 is written to the AD7719 DIN line ...
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AD7719 Pin No. Mnemonic Function 16 P2/SW2 Dual-Purpose Pin. It can act as a general-purpose output (P2) bit referenced between low-side power switch (SW2) to PWRGND. 17 PWRGND Ground Point for the Low-Side Power Switches SW2 ...
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READING NO MAIN ADC IN BUFFERED MODE DD DD RMS NOISE = 0.58 V rms INPUT RANGE = 20mV T ...
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AD7719 OSCILLATOR TIME BASE = 100ms/DIV TRACE 1 = TRACE 2 = 2V/DIV TPC 7. Typical Oscillator Power-Up DUAL-CHANNEL ADC CIRCUIT INFORMATION Overview The AD7719 incorporates ...
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CHOP ANALOG MUX INPUT Both Channels The operation of the aux channel is identical to the main channel with the exception that there is no PGA on the aux channel. The input chopping is incorporated into the input multiplexer ...
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AD7719 0 –20 –40 –60 –80 –100 –120 –140 –160 –180 –200 50 100 150 200 250 300 350 400 450 500 550 600 0 FREQUENCY (Hz OUTPUT DATA RATE = 105Hz INPUT BANDWIDTH = 25.2Hz FIRST ...
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Table II. Typical Output RMS Noise vs. Input Range and Update Rate for Main ADC (Buffered Mode) Output RMS Noise Data Update Word Rate (Hz 105.3 1.50 1.50 69 19.79 0.60 0.65 255 5.35 ...
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AD7719 ON-CHIP REGISTERS Both the main and auxiliary ADC channels are controlled and con- figured via a number of on-chip registers as shown in Figure 10 and described in more detail in the following pages. In the following descriptions, SET ...
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Register Name Type Size Communications Write Only 8 Bits Status Register Read Only 8 Bits ...
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AD7719 Register Name Type Size Main ADC (DATA0) Data Register Read Only 16 Bits or 24 Bits 0x00 0000 Aux ADC (DATA1) Data Register Read Only 16 Bits Main ADC Offset Register Read/Write 24 Bits Main ADC Gain Register Read/Write ...
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Communications Register (A3, A2, A1 The Communications register is an 8-bit write-only register. All communications to the part must start with a write operation to the Communications register. The data written to the Commu- ...
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AD7719 Status Register (A3, A2, A1 Power-On Reset = 0x00) The ADC Status register is an 8-bit read-only register. To access the ADC Status register, the user must write to the Communica- tions register ...
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Mode Register (A3, A2, A1 Power-On Reset = 0x00) The Mode register is an 8-bit register from which data can be read or to which data can be written. This register configures the operating ...
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AD7719 Operating Characteristics when Addressing the Mode and Control Registers 1. Any change to the MD bits will immediately reset both ADCs. A write to the MD2–0 bits with no change is also treated as a reset. (See exception to ...
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Table XIII. Main ADC Control Register (AD0CON) Bit Designations (continued) Bit Location Bit Name Description AD0CON2 RN2 Main ADC Range Bits. AD0CON1 RN1 Written by the user to select the main ADC input range as follows. AD0CON0 RN0 RN2 0 ...
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AD7719 Filter Register (A3, A2, A1 Power-On Reset = 0x45) The Filter register is an 8-bit ...
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Table XVI. IOCON (I/O and Current Source Control Register) Bit Designations Bit Bit Location Name Description IOCON15 PSW2 Power Switch 2 Control Bit. Set by user to enable power switch P2 to PWRGND. Cleared by user to enable use as ...
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AD7719 Main ADC Data Result Registers (DATA0): (A3, A2, A1 Power-On Reset = 0x00 0000) The conversion results for the main ADC channel are stored in the main ADC data register (DATA0). This register ...
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CONFIGURING THE AD7719 All user-accessible registers on the AD7719 are accessed via the serial interface. Communication with any of these registers is initiated by first writing to the Communications register. Figure 11 outlines a flow diagram of the sequence used ...
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AD7719 START POWER-ON/RESET FOR AD7719 CONFIGURE AND INITIALIZE C/ P SERIAL PORT WRITE TO THE COMMUNICATIONS REGISTER SELECTING NEXT OPERATION WRITE TO THE IOCON REGISTER WRITE TO THE IOCON REGISTER TO CONFIGURE THE CURRENT SOURCES, DIGITAL I/O ...
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AD7719-to-68HC11 Interface Figure 12 shows an interface between the AD7719 and the 68HC11 microcontroller. The diagram shows the minimum (3-wire) inter- face with CS on the AD7719 hardwired low. In this scheme, the RDY bits of the Status register are ...
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AD7719 AD7719-to-ADSP-2103/ADSP-2105 Interface Figure 14 shows an interface between the AD7719 and the ADSP-2103/ADSP-2105 DSP processor. In the interface shown, the RDY bits of the Status register are again monitored to determine when the Data register is updated. The alternative ...
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Analog Input Channels The main ADC has four associated analog input pins (labeled AIN1 to AIN4) that can be configured as two fully differential input channels or three pseudodifferential input channels. Channel selection bits CH1 and CH0 in the ADC0CON ...
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AD7719 Table XVIII. Max Resistance for No 16-Bit Gain Error (Unbuffered Mode) Gain 111.3K 27.8K 2 53.7K 13.5K 4 25.4K 6.4K 8–128 10.7K 2.9K Table XIX. Max Resistance for No 20-Bit Gain Error (Unbuffered Mode) ...
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Data Output Coding When the ADC is configured for unipolar operation, the output coding is natural (straight) binary with a zero differential input voltage resulting in a code of 000 . . . 000, a midscale voltage resulting in a ...
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AD7719 Reference Detect The AD7719 includes on-chip circuitry to detect if the part has a valid reference on the main ADC for conversions or calibrations. If the voltage between the external REFIN1(+) and REFIN1(–) pins goes below 0 ...
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Internally in the AD7719, the coefficients are normalized before being used to scale the words coming out of the digital filter. The offset calibration coefficient is subtracted from the result prior to the multiplication by the gain coefficient. From an ...
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AD7719 Pressure Measurement One typical application of the AD7719 is pressure measure- ment. Figure 19 shows the AD7719 used with a pressure transducer, the BP01 from Sensym. The pressure transducer is arranged in a bridge network and gives a differential ...
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REFIN(–) XTAL1 REFIN(+) R RL1 REF IOUT1 XTAL2 12.5k 200 A IOUT2 RL2 AIN1 DRDY RTD AD7719 SCLK AIN2 DIN RL3 DOUT RL4 DGND AGND PWRGND Figure 21. 4-Wire RTD Temperature Measurement ...
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AD7719 In this 3-wire configuration, the lead resistances will result in errors if only one current source is used because the 200 µA will flow through RL1, developing a voltage error between AIN1 and AIN2. In the scheme outlined below, ...
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COPLANARITY 0.10 CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 28-Lead Thin Shrink Small Outline Package [TSSOP] PIN 1 0.15 ...
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AD7719 Revision History Location 4/03—Data Sheet changed from REV REV. A. Updated format . . . . . . . . . . . . . . . . . . . . . . . . . ...