SAK-C164CI-8E25M Infineon Technologies, SAK-C164CI-8E25M Datasheet - Page 25
![IC, 16BIT MCU, 64K OTP, MQFP80, 164](/photos/19/7/190708/ge80mqfp05-40_sml.jpg)
SAK-C164CI-8E25M
Manufacturer Part Number
SAK-C164CI-8E25M
Description
IC, 16BIT MCU, 64K OTP, MQFP80, 164
Manufacturer
Infineon Technologies
Datasheet
1.SAK-C164CI-8E25M.pdf
(53 pages)
Specifications of SAK-C164CI-8E25M
Core Size
16bit
No. Of I/o's
59
Program Memory Size
64KB
Ram Memory Size
4KB
Cpu Speed
25MHz
Oscillator Type
External Only
No. Of Timers
5
Digital Ic Case Style
MQFP
Supply Voltage
RoHS Compliant
Controller Family/series
C164CI
Peripherals
ADC
Rohs Compliant
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SAK-C164CI-8E25M
Manufacturer:
INFINEON
Quantity:
49
Company:
Part Number:
SAK-C164CI-8E25M DB
Manufacturer:
Infineon Technologies
Quantity:
10 000
Instruction Set Summary
The table below lists the instructions of the C164CI in a condensed way.
The various addressing modes that can be used with a specific instruction, the operation of the
instructions, parameters for conditional execution of instructions, and the opcodes for each
instruction can be found in the “C16x Family Instruction Set Manual”.
This document also provides a detailled description of each instruction.
Instruction Set Summary
Mnemonic
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR, BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
Semiconductor Group
Description
Clear direct bit
Move (negated) direct bit to direct bit
Compare direct bit to direct bit
Bitwise modify masked high/low byte of bit-addressable
Compare word data to GPR and decrement GPR by 1/2
Determine number of shift cycles to normalize direct
Rotate left/right direct word GPR
Add word (byte) operands
Add word (byte) operands with Carry
Subtract word (byte) operands
Subtract word (byte) operands with Carry
(Un)Signed multiply direct GPR by direct GPR (16-16-bit)
(Un)Signed divide register MDL by direct GPR (16-/16-bit)
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit)
Complement direct word (byte) GPR
Negate direct word (byte) GPR
Bitwise AND, (word/byte operands)
Bitwise OR, (word/byte operands)
Bitwise XOR, (word/byte operands)
Set direct bit
AND/OR/XOR direct bit with direct bit
direct word memory with immediate data
Compare word (byte) operands
Compare word data to GPR and increment GPR by 1/2
word GPR and store result in direct word GPR
Shift left/right direct word GPR
Arithmetic (sign bit) shift right direct word GPR
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