CDB4350 Cirrus Logic Inc, CDB4350 Datasheet
CDB4350
Specifications of CDB4350
Related parts for CDB4350
CDB4350 Summary of contents
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Stereo DAC with Integrated PLL Features Advanced Multi-bit Delta-Sigma Architecture 109 dB Dynamic Range -91 dB THD+N 24-Bit Conversion Supports Audio Sample Rates Up to 192 kHz Low-Latency Digital Filtering Single-Ended or Differential Analog Output Architecture Integrated PLL ...
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... The CS4350 supports all standard digital audio interface formats, including TDM. The CS4350 is available in a 24-pin TSSOP package in both Commercial (-40° to +85°C) and Automotive grades (-40° to +105°C). The CDB4350 Customer Demonstration board is also available for device evaluation and imple- mentation suggestions. Please refer to These features are ideal for cost-sensitive, two-channel audio systems, including DVD players and recorders, set- top boxes, digital TVs, mini-component systems, mixing consoles and automotive audio systems ...
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TABLE OF CONTENTS 1. PIN DESCRIPTION.................................................................................................................................. 6 2. CHARACTERISTICS AND SPECIFICATIONS....................................................................................... 8 RECOMMENDED OPERATING CONDITIONS .......................................................................................... 8 ABSOLUTE MAXIMUM RATINGS............................................................................................................... 8 DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CZZ) ................................................................... 9 DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DZZ) .................................................................. 10 COMBINED INTERPOLATION & ...
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De-Emphasis Control (DEM[1:0]) Bits 3-2 ........................................................................... 30 8.2.3 Functional Mode (FM[1:0]) Bits 1-0...................................................................................... 30 8.3 Volume Mixing and Inversion Control - Register 03h .................................................................... 30 8.3.1 Channel A Volume = Channel B Volume (VOLB=A) Bit 7 ................................................... 30 8.3.2 ...
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LIST OF FIGURES Figure 1. Equivalent Output Load .............................................................................................................. 11 Figure 2. Maximum Loading....................................................................................................................... 11 Figure 3. THD+N vs Output Amplitude for VA = 5.0 V ............................................................................... 11 Figure 4. THD+N vs Output Amplitude for VA = 3.3 V ............................................................................... ...
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PIN DESCRIPTION DIF2(AD1/CDOUT) DEM(AD0/CS) DIF0(SDA/CDIN) DIF1(SCL/CCLK) VLC VD_FILT GND RMCK VLS SCLK SDIN LRCK Pin Name # Pin Description VLC Control Interface Power (Input) - Positive power for the hardware/software control interface 5 VD_FILT Regulator Voltage (Output) - Filter ...
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Reset (Input) - When pulled low, device will power down and reset all internal registers to their default RST 24 settings. Control Port Definitions Address Bit 1 / Serial Control Data Out (I/O) - Chip address bit 1 in I²C ...
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CHARACTERISTICS AND SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS GND = 0 V; all voltages with respect to ground. Parameters DC Power Supply Ambient Operating Temperature (Power Applied) ABSOLUTE MAXIMUM RATINGS GND = 0 V; all voltages with respect to Parameters DC ...
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DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CZZ) Test conditions (unless otherwise specified): VLS = VLC = 3 wave; Valid with the recommended capacitor values on VD_FILT, VQ, VBIAS (as shown in the typical connection diagram in Figure 10) and ...
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DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DZZ) Test conditions (unless otherwise specified): VLS = 1. 5.25 V, VLC = 3. 5. 105° C, input test signal is a 997 Hz sine wave; Valid with the ...
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CS4350 3.3 µF + AOUTx R GND Figure 1. Equivalent Output Load Figures 3 through 5 show typical THD+N performance for CS4350 devices that exhibit the maximum full scale out- put voltages as specified in the DAC Analog Characteristics tables ...
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COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE The filter characteristics have been normalized to the sample rate (Fs) and can be referenced to the desired sam- ple rate by multiplying the given characteristic by Fs. Amplitude vs. Frequency plots of ...
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SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE Inputs: Logic 0 = GND; Logic 1 = VLS; C Parameters 3.14 V RMCK Output Frequency (Note 10) RMCK Output Duty Cycle Input Sample Rate LRCK Duty Cycle (Non-TDM Mode) SDIN Setup Time Before ...
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LRCK (input lckd lcks SCLK (input SDIN (input) Figure 6. Serial Port Timing, Non-TDM Mode SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT Inputs: Logic 0 = GND; Logic 1 = VLC; C ...
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SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT Inputs: Logic 0 = GND; Logic 1 = VLC; C Parameter CCLK Clock Frequency RST Rising Edge to CS Falling CCLK Edge to CS Falling (Note 12) CS High Time Between Transmissions ...
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DIGITAL CHARACTERISTICS Parameters High-Level Input Voltage High-Level Input Voltage Input Leakage Current Input Capacitance High Level Output Voltage (RMCK Low Level Output Voltage (RMCK RMCK Output Load Drive Maximum MUTEC Drive Current MUTEC High-Level Output Voltage ...
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TYPICAL CONNECTION DIAGRAM *Optional for PopGuard VLS Disable *47 kΩ Digital Audio Source +1 0.1 µF +3 0.1 µF µ C/ Mode Configuration DS691F1 0.1 µF 18 VBIAS RMCK ...
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APPLICATIONS 4.1 Sample Rate Range and Oversampling Mode Detect The device operates in one of three oversampling modes based on the input sample rate. In Control Port Mode, the allowed sample rate range in each mode will depend on ...
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Digital Interface Format The device will accept audio samples digital interface formats, as shown in Stand-Alone Mode and Table 3 on page 29 The desired serial audio interface format is selected via the DIF[2:0] bits ...
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Time-Division Multiplex (TDM) Mode Four TDM interface modes are available that allow the CS4350 to input stereo PCM data in one of 4 time “slots”. Figure 14 shows the serial port connections necessary to input 8-channel TDM data into ...
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De-Emphasis The device includes on-chip digital de-emphasis. 44.1 kHz. The frequency response of the de-emphasis curve will scale proportionally with changes in sam- ple rate, Fs. -10dB Note: De-emphasis is only available in Single-Speed Mode. 4.5 Mute Control The ...
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Control Port Mode 1. Hold RST low until the power supply is stable and the left/right clock is fixed to the appropriate frequency, as discussed in will remain low, and VBIAS will be connected to VA. 2. Bring RST ...
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... DAC. If desired, all supply pins may be connected to the same supply, but a decoupling ca- pacitor should still be placed on each supply pin. Note: All decoupling capacitors should be referenced to GND. The CDB4350 evaluation board demonstrates the optimum layout and power supply arrangements. DS691F1 5600 pF 4.02 kΩ ...
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STAND-ALONE OPERATION 5.1 Serial Port Format Selection The desired serial audio format is selected with the DIF2, DIF1 and DIF0 pins. For an explanation of the required relationship between the LRCK, SCLK and SDIN, see on the rising edge ...
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CONTROL PORT OPERATION The control port is used to load all the internal register settings (see ation of the control port may be completely asynchronous with the audio sample rate. However, to avoid potential interference problems, the control port ...
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MAP or the default address (see device. 3. Once the device has transmitted the contents of the register pointed to by the MAP, issue an ACK the INCR bit is set to 1, the device will continue to ...
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SPI Read To read from the device, follow the procedure below while adhering to the values specified in Characteristics - Control Port - SPI Format” on page 1. Bring CS low. 2. The address byte on the CDIN pin ...
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REGISTER QUICK REFERENCE Addr Function 7 1h Device and RevID DeviceID4 DeviceID3 DeviceID2 DeviceID1 default 1 2h Mode Control Reserved default 0 3h Volume, Mixing, VOLB=A and Inversion Control default 0 4h AMUTE Mute Control default 1 5h Channel ...
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REGISTER DESCRIPTION Note: All register access is Read/Write unless specified otherwise 8.1 Device and Revision ID - Register 01h 7 6 Device4 Device3 Device2 1 1 Function: This register is Read-Only decoded as follows: Rev A B ...
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De-Emphasis Control (DEM[1:0]) Bits 3-2 Default = De-emphasis 01 - 44.1 kHz De-emphasis kHz De-emphasis kHz De-emphasis Function: Selects the appropriate digital filter to maintain the standard 15 μs/50 ...
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Invert Signal Polarity (INVERT_B) Bit 5 Function: When set to 1, this bit inverts the signal polarity of channel B. When set to 0 (default), this function is disabled. This function is only available for Left Justified, Right Justified ...
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ATAPI_A1 ATAPI_A0 ATAPI_B1 ATAPI_B0 8.4 Mute Control - Register 04h 7 6 AMUTE Reserved MUTEC A 8.4.1 Auto-Mute (AMUTE) Bit 7 Function: ...
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Channel A & B Volume Control - Register 05h & 06h 7 6 VOL7 VOL6 VOL5 0 0 Digital Volume Control (VOL[7:0]) Default = 00h (0 dB) Function: The Digital Volume Control registers allow independent control of the signal ...
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Soft Ramp and Zero Cross Soft Ramp and Zero Cross Enable dictate that signal level changes, either by attenuation changes or mut- ing, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB ...
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Freeze Controls (FREEZE) Bit 5 Function: When set to 1, this function allows modifications to be made to the registers without the changes taking effect until FREEZE is set back make multiple changes in the Control ...
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FILTER PLOTS 100 120 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) Figure 23. Stopband Rejection (fast), all Modes 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0 0.05 0.1 0.15 0.2 0.25 0.3 ...
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Frequency (normalized to Fs) Figure 29. Quad-Speed (fast) Passband Detail DS691F1 0.5 0.4 0.3 0.2 0.1 0 −0.1 −0.2 −0.3 −0.4 −0.5 0.2 0.25 0.3 ...
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DEFINITIONS Total Harmonic Distortion + Noise (THD+N) The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified bandwidth (typically kHz), including distortion components. Expressed ...
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DIMENSIONS 24L TSSOP (4.4 mm BODY) PACKAGE DRAWING TOP VIEW INCHES DIM MIN NOM 0.002 0.004 A2 0.03346 0.0354 b 0.00748 0.0096 D 0.303 0.307 E 0.248 0.2519 E1 0.169 0.1732 ...
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... Figure 5 on page 11. 16. CS4350 Container Order# Rail CS4350-CZZ Tape and Reel CS4350-CZZR Rail CS4350-DZZ Tape and Reel CS4350-DZZR - - CDB4350 and “Typical Connection Diagram” “SPI Mode” on page 26. Section 6.2 on page 25. Section 6.2.1 on page 9. 10. 13. 16. 9. 10. 13. 25. DS691F1 ...
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Contacting Cirrus Logic Support For all product questions and inquiries, contact a Cirrus Logic Sales Representative. To find the one nearest you IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this ...