DSPIC30F3010-20E/SO Microchip Technology, DSPIC30F3010-20E/SO Datasheet - Page 85

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DSPIC30F3010-20E/SO

Manufacturer Part Number
DSPIC30F3010-20E/SO
Description
IC,DSP,16-BIT,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010-20E/SO

Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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13.0
This section describes the output compare module and
associated operational modes. The features provided
by this module are useful in applications requiring
operational modes such as:
• Generation of Variable Width Output Pulses
• Power Factor Correction
Figure 13-1
compare module.
FIGURE 13-1:
© 2010 Microchip Technology Inc.
Note:
From GP Timer Module
Note:
OUTPUT COMPARE MODULE
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
depicts a block diagram of the output
Where ‘x’ is shown, reference is made to the registers associated with the respective output compare channels,
1 through N.
TMR2<15:0
OUTPUT COMPARE MODE BLOCK DIAGRAM
0
Comparator
OCxRS
OCxR
TMR3<15:0>
1
OCTSEL
T2P2_MATCH
0
The key operational features of the output compare
module include:
• Timer2 and Timer3 Selection mode
• Simple Output Compare Match mode
• Dual Output Compare Match mode
• Simple PWM mode
• Output Compare during Sleep and Idle modes
• Interrupt on Output Compare/PWM Event
These operating modes are determined by setting the
appropriate bits in the 16-bit OCxCON SFR (where
x = 1,2,3,...,N). The dsPIC30F3010/3011 devices have
4/2 compare channels, respectively.
OCxRS and OCxR in the figure represent the Dual
Compare registers. In the Dual Compare mode, the
OCxR register is used for the first compare and OCxRS
is used for the second compare.
T3P3_MATCH
dsPIC30F3010/3011
Mode Select
OCM<2:0>
1
Output
Logic
3
Set Flag bit
OCxIF
R
S
Q
Output Enable
(for x = 1, 2, 3 or 4)
DS70141F-page 85
OCx
OCFA

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