ISL5416KIZ Intersil, ISL5416KIZ Datasheet - Page 25
![no-image](/images/manufacturer_photos/0/3/341/intersil_sml.jpg)
ISL5416KIZ
Manufacturer Part Number
ISL5416KIZ
Description
IC,Downconverter,BGA,256PIN,PLASTIC
Manufacturer
Intersil
Datasheet
1.ISL5416KIZ.pdf
(71 pages)
Specifications of ISL5416KIZ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL5416KIZ
Manufacturer:
INTERSIL
Quantity:
2
Part Number:
ISL5416KIZ
Manufacturer:
INTERSIL
Quantity:
20 000
To Write to the Internal Registers:
To Read Internal Registers:
NOTE: After an indirect write to a single channel, the data
can be read at direct addresses 0 and 1 after 4 clock
periods.
Bits 0, 2, 4, 6 are the OR-ing together of the individual data
path. Saturation bits listed in *01Fh (Table 14). These bits
are latched when set. Awrite to *01F clears the bit(s).
1. Load the indirect write holding registers at direct address
2. Write the Indirect Write Address of the internal register
3. Wait 4 clock cycles before performing the next write to the
1. Write the Indirect Read Address of the internal register
2. Perform a read of the Indirect Read Holding Registers at
ADD(2:0) = 0 and 1 with the data for the internal register
(32 bits).
being addressed to direct address ADD(2:0) = 2 (Note: A
write strobe to transfer the contents of the Indirect Write
Holding Register into the Target Register specified by the
Indirect Address will be generated internally).
indirect write holding registers.
being read to direct address ADD(2:0) = 3.
direct address ADD(2:0) = 0 and 1.
15:8
7:6
5:4
3:2
1:0
REVISION CODE.
0x00h = prototype silicon.
0x01h = production silicon.
CHANNEL 3 STATUS. Bit 7 is always zero, bit 6 indicates data path saturation.
CHANNEL 2 STATUS. Bit 5 is always zero, bit 4 indicates data path saturation.
CHANNEL 1 STATUS. Bit 3 is always zero, bit 2 indicates data path saturation.
CHANNEL 0 STATUS. Bit 1 is always zero, bit 0 indicates data path saturation.
25
TABLE 7. STATUS BITS READ DIRECT ADDRESS 2 FOR (15:0)
ISL5416
JTAG
JTAG: The IEEE 1149.1 Joint Test Action Group boundary
scan standard operational codes shown in Table 2 are
supported. A separate application note is available with
implementation details
JTAG Op Codes Supported
SAMPLE/PRELOAD
INSTRUCTION
BYPASS
EXTEST
IDCODE
INTEST
TABLE 6.
OP CODE
0000
0001
0010
0011
1111