MCP6541T-I/LT Microchip Technology, MCP6541T-I/LT Datasheet - Page 14

IC,VOLT COMPARATOR,SINGLE,CMOS,TSSOP,6PIN,PLASTIC

MCP6541T-I/LT

Manufacturer Part Number
MCP6541T-I/LT
Description
IC,VOLT COMPARATOR,SINGLE,CMOS,TSSOP,6PIN,PLASTIC
Manufacturer
Microchip Technology
Type
General Purposer
Datasheets

Specifications of MCP6541T-I/LT

Rohs Compliant
YES
Number Of Elements
1
Output Type
CMOS, Push-Pull, Rail-to-Rail, TTL
Voltage - Supply
1.6 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
6-TSSOP (5 lead), SC-88A, SOT-353
Comparator Type
General Purpose
No. Of Comparators
1
Response Time
4µs
Ic Output Type
CMOS, Push Pull, TTL
Supply Current
600nA
Supply Voltage Range
1.6V To 5.5V
Output Compatibility
CMOS, TTL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MCP6541T-I/LT
MCP6541T-I/LTTR

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Part Number:
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Manufacturer:
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Quantity:
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Manufacturer:
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Quantity:
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Part Number:
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0
MCP6541/2/3/4
Where:
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
EQUATION 4-2:
Figure 2-20 and Figure 2-23 can be used to determine
typical values for V
4.5
With this family of comparators, the power supply pin
(V
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge rate performance.
4.6
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-31).
The supply current increases with increasing toggle
frequency
capacitive loads.
4.7
In order to maximize battery life in portable
applications, use large resistors and small capacitive
loads. Avoid toggling the output more than necessary.
Do not use Chip Select (CS) frequently to conserve
start-up power. Capacitive loads will draw additional
power at start-up.
DS21696D-page 14
V
V
DD
TLH
THL
for single supply) should have a local bypass
V
= trip voltage from low to high
= trip voltage from high to low
V
THL
TLH
Bypass Capacitors
Capacitive Loads
Battery Life
(Figure 2-19),
=
=
V
V
V
OH
OL
23
OH
R
---------------------- -
R
---------------------- -
R
=
23
23
and V
23
R
R
------------------
R
=
+
+
23
2
23
R
+
R F
R F
------------------
R
3
R
OL
2
R
especially
2
+
3
R
.
+
+
×
R
3
3
V
V
V
DD
23
23
--------------------- -
R
--------------------- -
R
23
23
R
R
+
with
+
F
F
R
R
F
F
higher
4.8
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow. This is greater than the
MCP6541/2/3/4 family’s bias current at 25°C (1 pA,
typ.).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-8.
FIGURE 4-8:
for Inverting Circuit.
1.
2.
Inverting Configuration (Figures 4-5 and 4-8):
a.
b.
Non-inverting Configuration (Figure 4-3):
a.
b.
PCB Surface Leakage
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the
comparator (e.g., V
Connect the inverting pin (V
pad without touching the guard ring.
Connect the non-inverting pin (V
input pad without touching the guard ring.
Connect the guard ring to the inverting input
pin (V
IN
–).
V
IN
IN
Guard Ring
+). This biases the guard ring
Example Guard Ring Layout
-
© 2006 Microchip Technology Inc.
12
DD
Ω. A 5V difference would
/2 or ground).
V
IN
+
IN
–) to the input
IN
V
SS
+) to the

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