PIC16C717-I/SS Microchip Technology, PIC16C717-I/SS Datasheet - Page 55
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16C717-I/SS
Manufacturer Part Number
PIC16C717-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C770-ISO.pdf
(220 pages)
3.PIC16C770-ISO.pdf
(6 pages)
4.PIC16C770-ISO.pdf
(8 pages)
Specifications of PIC16C717-I/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1016 - ADAPTER 20-SSOP TO 18-DIP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16C717I/SS
- PIC16F818-ISO PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16C770-ISO PDF datasheet #4
- Current page: 55 of 220
- Download datasheet (4Mb)
8.0
The
module contains a 16-bit register which can operate as
a 16-bit capture register, as a 16-bit compare register
or as a PWM master/slave Duty Cycle register.
Table 8-1 shows the timer resources of the ECCP mod-
ule modes.
REGISTER 8-1:
2002 Microchip Technology Inc.
ECCP
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULES
bit 7-6
bit 5-4
bit 3-0
(Enhanced
CCP1 CONTROL REGISTER (CCP1CON: 17h)
PWM1M<1:0>: PWM Output Configuration
CCP1M<3:2> = 00, 01, 10
xx = P1A assigned as Capture input, Compare output. P1B, P1C, P1D assigned as Port pins.
CCP1M<3:2> = 11
00 = Single output. P1A modulated. P1B, P1C, P1D assigned as Port pins.
01 = Full-bridge output forward. P1D modulated. P1A active. P1B, P1C inactive.
10 = Half-bridge output. P1A, P1B modulated with deadband control. P1C, P1D assigned as
11 = Full-bridge output reverse. P1B modulated. P1C active. P1A, P1D inactive.
DC1B<1:0>: PWM Duty Cycle Least Significant bits
Capture Mode: Unused
Compare Mode: Unused
PWM Mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in
CCP1M<3:0>: ECCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set; ECCP resets TMR1, and starts
1100 = PWM mode. P1A, P1C active high. P1B, P1D active high.
1101 = PWM mode. P1A, P1C active high. P1B, P1D active low.
1110 = PWM mode. P1A, P1C active low. P1B, P1D active high.
1111 = PWM mode. P1A, P1C active low. P1B, P1D active low.
bit 7
Legend:
R = Readable bit
- n = Value at POR
PWM1M1 PWM1M0
R/W-0
Port pins.
Capture/Compare/PWM)
an A/D conversion, if the A/D module is enabled.)
unaffected)
CCPRnL.
R/W-0
DC1B1
R/W-0
W = Writable bit
’1’ = Bit is set
DC1B0
R/W-0
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON and P1DEL reg-
isters control the operation of ECCP. All are readable
and writable.
PIC16C717/770/771
CCP1M3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
CCP1M2
R/W-0
CCP1M1
x = Bit is unknown
R/W-0
DS41120B-page 53
CCP1M0
R/W-0
bit 0
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