PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 126
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F628AT-E/SS
Manufacturer Part Number
PIC16F628AT-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16F628AT-E/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F627A/628A/648A
DS40044G-page 126
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Move W to f
[ label ]
0 ≤ f ≤ 127
(W) → (f)
None
00
Move data from W register to
register ‘f’.
1
1
MOVWF
Before Instruction
After Instruction
No Operation
[ label ]
None
No operation
None
00
No operation.
1
1
NOP
REG1 = 0xFF
W
REG1 = 0x4F
W
0000
REG1
0000
MOVWF
NOP
= 0x4F
= 0x4F
1fff
0xx0
f
ffff
0000
OPTION
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Load Option Register
[ label ]
None
(W) → OPTION
None
00
The contents of the W register are
loaded in the OPTION register.
This instruction is supported for
code compatibility with PIC16C5X
products. Since OPTION is a
readable/writable register, the
user can directly address it. Using
only register instruction such as
MOVWF.
1
1
To maintain upward compatibil-
ity with future PIC
products, do not use this
instruction.
Return from Interrupt
[ label ]
None
TOS → PC,
1 → GIE
None
00
Return from Interrupt. Stack is
POPed and Top-of-Stack (TOS)
is loaded in the PC. Interrupts
are enabled by setting Global
Interrupt Enable bit, GIE
(INTCON<7>). This is a two-
cycle instruction.
1
2
RETFIE
After Interrupt
© 2009 Microchip Technology Inc.
PC = TOS
GIE = 1
0000
OPTION
0000
RETFIE
0110
0000
®
MCU
0010
1001
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