PIC16F628AT-E/SS Microchip Technology, PIC16F628AT-E/SS Datasheet - Page 70
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F628AT-E/SS
Manufacturer Part Number
PIC16F628AT-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16F628AT-E/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIP
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F627A/628A/648A
FIGURE 11-1:
EXAMPLE 11-1:
11.2
The full range of V
the construction of the module. The transistors on the
top and bottom of the resistor ladder network
(Figure 11-1) keep V
The Voltage Reference module is V
therefore, the V
V
erence module can be found in Table 17-3.
11.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time out, the contents of
the VRCON register are not affected. To minimize
current consumption in Sleep mode, the Voltage
Reference module should be disabled.
11.4
A device Reset disables the Voltage Reference module
by clearing bit VREN (VRCON<7>). This Reset also
disconnects the reference from the RA2 pin by clearing
bit VROE (VRCON<6>) and selects the high voltage
range by clearing bit VRR (VRCON<5>). The V
value select bits, VRCON<3:0>, are also cleared.
DS40044G-page 70
MOVLW
MOVWF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
CALL
DD
. The tested absolute accuracy of the Voltage Ref-
VREN
Note:
Voltage Reference Accuracy/Error
Operation During Sleep
Effects of a Reset
0x02
CMCON
STATUS,RP0 ;go to Bank 1
0x07
TRISA
0xA6
VRCON
STATUS,RP0 ;go to Bank 0
DELAY10
REF
R is defined in Table 17-3.
SS
V
output changes with fluctuations in
REF
REF
to V
VOLTAGE REFERENCE BLOCK DIAGRAM
VOLTAGE REFERENCE
CONFIGURATION
;4 Inputs Muxed
;to 2 comps.
;RA3-RA0 are
;outputs
;enable V
;low range set V
;10μs delay
from approaching V
V
DD
DD
cannot be realized due to
8R
REF
DD
R
derived and
R
<3:0>=6
SS
or V
R
REF
DD
.
16 Stages
16-1 Analog Mux
11.5
The Voltage Reference module operates independently
of the Comparator module. The output of the reference
generator may be connected to the RA2 pin if the
TRISA<2> bit is set and the VROE bit, VRCON<6>, is
set. Enabling the Voltage Reference module output onto
the RA2 pin with an input signal present will increase
current consumption. Connecting RA2 as a digital output
with V
tion.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited drive
capability, a buffer must be used in conjunction with the
Voltage Reference module output for external connec-
tions to V
technique.
R
REF
Connection Considerations
REF
enabled will also increase current consump-
R
. Figure 11-2 shows an example buffering
V
SS
© 2009 Microchip Technology Inc.
8R
V
V
R
R
3
0
(From VRCON<3:0>)
V
SS
VRR
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