PIC16F677T-E/SS Microchip Technology, PIC16F677T-E/SS Datasheet - Page 125

• Manufacturer Part Number: PIC16F677T-E/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F677T-E/SS

• Rohs Compliant: YES
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPDM164125 - BOARD DEMO PICDEM TOUCH SENSE 1AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / Rohs Status: Details

10.1.4
To read a program memory location, the user must
write the Least and Most Significant address bits to the
EEADR and EEADRH registers, set the EEPGD con-
trol bit of the EECON1 register, and then set control bit
RD. Once the read control bit is set, the program mem-
ory Flash controller will use the second instruction
cycle to read the data. This causes the second instruc-
tion immediately following the “BSF
instruction to be ignored. The data is available in the
very next cycle, in the EEDAT and EEDATH registers;
therefore, it can be read as two bytes in the following
instructions.
EXAMPLE 10-3:
© 2008 Microchip Technology Inc.
;
;
BANKSEL EEADR
MOVF
MOVWF
MOVF
MOVWF
BANKSEL EECON1
BSF
BSF
NOP
BANKSEL EEDAT
MOVF
MOVWF
MOVF
MOVWF
BANKSEL 0x00
NOP
READING THE FLASH PROGRAM
MEMORY (PIC16F685/PIC16F689/
PIC16F690)
MS_PROG_EE_ADDR, W
EEADRH
LS_PROG_EE_ADDR, W
EEADR
EECON1, EEPGD
EECON1, RD
EEDAT, W
LOWPMBYTE
EEDATH, W
HIGHPMBYTE
FLASH PROGRAM READ
PIC16F631/677/685/687/689/690
EECON1,RD”
;
;
;MS Byte of Program Address to read
;
;LS Byte of Program Address to read
;
;Point to PROGRAM memory
;EE Read
;First instruction after BSF EECON1,RD executes normally
;Any instructions here are ignored as program
;memory is read in second cycle after BSF EECON1,RD
;
;W = LS Byte of Program Memory
;
;W = MS Byte of Program EEDAT
;
;Bank 0
EEDAT and EEDATH registers will hold this value until
another read or until it is written to by the user.
Note 1: The two instructions following a program
2: If the WR bit is set when EEPGD = 1, it
memory read are required to be NOPs.
This prevents the user from executing a
two-cycle
instruction after the RD bit is set.
will be immediately reset to ‘0’ and no
operation will take place.
instruction
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