PIC16F677T-E/SS Microchip Technology, PIC16F677T-E/SS Datasheet - Page 225

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC

PIC16F677T-E/SS

Manufacturer Part Number
PIC16F677T-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F677T-E/SS

Rohs Compliant
YES
Mfg Application Notes
Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPDM164125 - BOARD DEMO PICDEM TOUCH SENSE 1AC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / Rohs Status
 Details
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
© 2008 Microchip Technology Inc.
Return from Interrupt
[ label ]
None
TOS → PC,
1 → GIE
None
Return from Interrupt. Stack is
POPed and Top-of-Stack (TOS) is
loaded in the PC. Interrupts are
enabled by setting Global
Interrupt Enable bit, GIE
(INTCON<7>). This is a two-cycle
instruction.
1
2
After Interrupt
RETFIE
PC =
GIE =
RETFIE
PIC16F631/677/685/687/689/690
TOS
1
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
TABLE
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
Return from Subroutine
[ label ]
None
TOS → PC
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
Return with literal in W
[ label ]
0 ≤ k ≤ 255
k → (W);
TOS → PC
None
The W register is loaded with the
eight-bit literal ‘k’. The program
counter is loaded from the top of
the stack (the return address).
This is a two-cycle instruction.
1
2
Before Instruction
After Instruction
CALL TABLE;W contains
table
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
RETLW kn ;End of table
W
W
RETURN
RETLW k
;offset value
;W now has
;table value
=
=
DS41262E-page 223
0x07
value of k8

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