PIC16F685-I/ML Microchip Technology, PIC16F685-I/ML Datasheet - Page 143

• Manufacturer Part Number: PIC16F685-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F685-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINDVA1004 - DEVICE ADAPTER 8/14/20DIP
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.4.4
The PWM mode supports an Auto-Shutdown mode that
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
ECCPASx bits of the ECCPAS register. A shutdown
event may be generated by:
• A logic ‘0’ on the INT pin
• Comparator C1
• Comparator C2
• Setting the ECCPASE bit in firmware
FIGURE 11-14:
© 2008 Microchip Technology Inc.
From Comparator C2
From Comparator C1
INT
ENHANCED PWM
AUTO-SHUTDOWN MODE
ECCPAS<2:0>
AUTO-SHUTDOWN BLOCK DIAGRAM
111
110
101
100
011
010
001
000
PIC16F631/677/685/687/689/690
From Data Bus
Write to ECCPASE
PRSEN
R
D
Q
S
A shutdown condition is indicated by the ECCPASE
(Auto-Shutdown Event Status) bit of the ECCPAS
register. If the bit is a ‘0’, the PWM pins are operating
normally. If the bit is a ‘1’, the PWM outputs are in the
shutdown state.
When a shutdown event occurs, two things happen:
The ECCPASE bit is set to ‘1’. The ECCPASE will
remain set until cleared in firmware or an auto-restart
occurs (see Section 11.4.5 “Auto-Restart Mode”).
The enabled PWM pins are asynchronously placed in
their shutdown states. The PWM output pins are
grouped into pairs [P1A/P1C] and [P1B/P1D]. The state
of each pin pair is determined by the PSSAC and
PSSBD bits of the ECCPAS register. Each pin pair may
be placed into one of three states:
• Drive logic ‘1’
• Drive logic ‘0’
• Tri-state (high-impedance)
ECCPASE
PSSAC<1>
PSSBD<1>
PSSAC<1>
PSSBD<1>
PSSAC<0>
P1A_DRV
PSSBD<0>
P1B_DRV
PSSAC<0>
P1C_DRV
PSSBD<0>
P1D_DRV
TRISx
TRISx
TRISx
TRISx
1
0
1
0
1
0
1
0
DS41262E-page 141
P1A
P1C
P1B
P1D