PIC16F685-I/ML Microchip Technology, PIC16F685-I/ML Datasheet - Page 258

• Manufacturer Part Number: PIC16F685-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F685-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINDVA1004 - DEVICE ADAPTER 8/14/20DIP
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F631/677/685/687/689/690
FIGURE 17-18:
TABLE 17-16: A/D CONVERSION REQUIREMENTS
DS41262E-page 256
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
130*
131
132*
134
Note 1:
Param
No.
2:
A/D Data
Note 1: If the A/D clock source is selected as RC, a time of T
A/D CLK
*
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
BSF ADCON0, GO
ADRES
Sample
T
T
T
T
Sym.
ADIF
AD
CNV
ACQ
GO
These parameters are characterized but not tested.
only and are not tested.
ADRESH and ADRESL registers may be read on the following T
See Table 9-1 for minimum conditions.
GO
Q4
SLEEP instruction to be executed.
134
A/D Clock Period
A/D Internal RC
Oscillator Period
Conversion Time
(not including
Acquisition Time)
Acquisition Time
Q4 to A/D Clock
Start
Characteristic
132
A/D CONVERSION TIMING (NORMAL MODE)
-40°C ≤ T
(T
(1)
OSC
A
≤ +125°C
/2)
(1)
Min.
3.0*
3.0*
2.0*
1.5
—
(2)
—
9
5*
OLD_DATA
8
T
Typ†
OSC
11.5
6.0
4.0
—
—
11
—
Sampling Stopped
131
7
/2
6
CY
Max.
9.0*
6.0*
130
—
—
—
—
—
—
is added before the A/D clock starts. This allows the
3
Units
T
CY
μs
μs
μs
μs
μs
μs
—
AD
2
cycle.
T
T
ADCS<1:0> = 11 (RC mode)
At V
At V
Set GO bit to new data in A/D Result
register
The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled
voltage (as stored on C
If the A/D clock source is selected as
RC, a time of T
the A/D clock starts. This allows the
SLEEP instruction to be executed.
OSC
OSC
1
DD
DD
-based, V
-based, V
© 2008 Microchip Technology Inc.
= 2.5V
= 5.0V
0
Conditions
REF
REF
CY
NEW_DATA
is added before
DONE
1 T
≥ 2.5V
full range
CY
1 T
HOLD
CY
).