PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 111

20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,

PIC16F785-E/SS

Manufacturer Part Number
PIC16F785-E/SS
Description
20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.2
The PIC16F785/HV785 differentiates between various
kinds of Reset:
• Power-on Reset (POR)
• WDT Reset during normal operation
• WDT Reset during Sleep
• MCLR Reset during normal operation
• MCLR Reset during Sleep
• Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
FIGURE 15-1:
© 2008 Microchip Technology Inc.
MCLR/V
Note
CLKI pin
OSC1/
V
DD
Reset
PP
1:
pin
LFINTOSC
Refer to the Configuration Word register (Register 15.2).
OST/PWRT
Brown-out
V
Module
Detect
DD
WDT
Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
SBOREN
Power-on Reset
BOREN
External
Reset
Sleep
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 15-2. These bits are
used in software to determine the nature of the Reset.
See Table 15-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 15-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 19.0 “Electrical
Specifications” for pulse width specifications.
PIC16F785/HV785
Enable PWRT
Enable OST
S
R
DS41249E-page 109
Q
Chip_Reset

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