PIC16F785-E/SS Microchip Technology, PIC16F785-E/SS Datasheet - Page 31

• Manufacturer Part Number: PIC16F785-E/SS
• Description: 20 PIN, 3.5 KB STD FLASH, 128 RAM, 18 I/O PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F785-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162060 - HEADER INTRFC MPLAB ICD2 20PIN
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.4.3
The Low-frequency Internal Oscillator (LFINTOSC) is
an uncalibrated (approximate) 31 kHz internal clock
source.
The output of the LFINTOSC connects to a postscaler
and multiplexer (see Figure 3-1). 31 kHz can be
selected via software using the IRCF bits (see
Section 3.4.4 “Frequency Select Bits (IRCF)”). The
LFINTOSC is also the frequency for the Power-up
Timer (PWRT), Watchdog Timer (WDT) and Fail-Safe
Clock Monitor (FSCM).
The LFINTOSC is enabled by selecting 31 kHz
(IRCF = 000) as the system clock source (SCS = 1), or
when any of the following are enabled:
• Two-Speed Start-up (IESO = 1 and IRCF = 000)
• Power-up Timer (PWRT)
• Watchdog Timer (WDT)
• Fail-Safe Clock Monitor (FSCM)
The LF Internal Oscillator (LTS) bit, in the OSCCON
register, indicates whether the LFINTOSC is stable or
not.
3.4.4
The output of the 8 MHz HFINTOSC and 31 kHz LFIN-
TOSC connect to a postscaler and multiplexer (see
Figure 3-1). The Internal Oscillator Frequency select
bits IRCF<2:0> in the OSCCON Register select the fre-
quency output of the internal oscillators. One of eight
frequencies can be selected via software:
• 8 MHz
• 4 MHz (Default after Reset)
• 2 MHz
• 1 MHz
• 500 kHz
• 250 kHz
• 125 kHz
• 31 kHz
© 2008 Microchip Technology Inc.
Note:
LFINTOSC
FREQUENCY SELECT BITS (IRCF)
Following any Reset, the IRCF bits are set
to ‘110’ and the frequency selection is
forced to 4 MHz. The user can modify the
IRCF bits to select a different frequency.
3.4.5
When switching between the LFINTOSC and the HFIN-
TOSC, the new oscillator may already be shut down to
save power. If this is the case, there is a 10 μs delay
after the IRCF bits are modified before the frequency
selection takes place. The LTS/HTS bits will reflect the
current active status of the LFINTOSC and the HFIN-
TOSC oscillators. The timing of a frequency selection is
as follows:
1.
2.
3.
4.
5.
6.
If the internal oscillator speed selected is between
8 MHz and 125 kHz, there is no start-up delay before
the new frequency is selected. This is because the old
and the new frequencies are derived from the
HFINTOSC via the postscaler and multiplexer.
Note:
IRCF bits are modified.
If the new clock is shut down, a 10 μs clock start-
up delay is started.
Clock switch circuitry waits for a falling edge of
the current clock.
CLKOUT is held low and the clock switch
circuitry waits for a rising edge in the new clock.
CLKOUT is now connected with the new clock.
HTS/LTS bits are updated as required.
Clock switch is complete.
PIC16F785/HV785
HF AND LF INTOSC CLOCK
SWITCH TIMING
Care must be taken to ensure an invalid
voltage or frequency selection is not
selected. An example of an invalid config-
uration is selecting 8 MHz when V
2.0V.
DS41249E-page 29
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