PIC16F785T-I/ML Microchip Technology, PIC16F785T-I/ML Datasheet - Page 124

3.5 KB Flash, 128 RAM, 18 I/O 20 QFN 4x4mm T/R

PIC16F785T-I/ML

Manufacturer Part Number
PIC16F785T-I/ML
Description
3.5 KB Flash, 128 RAM, 18 I/O 20 QFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F785T-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F785/HV785
REGISTER 15-2:
TABLE 15-8:
DS41249E-page 122
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-1
bit 0
Name
OPTION_REG
STATUS
WDTCON
Legend:
Note
Note 1: If WDTE configuration bit = 1, then WDT is always enabled, irrespective of this control bit. If WDTE con-
U-0
1:
Shaded cells are not used by the Watchdog Timer.
See Register 15.2 for operation of all Configuration Word bits.
figuration bit = 0, then it is possible to turn WDT on/off with this control bit.
RAPU
Bit 7
Unimplemented: Read as ‘0’
WDTPS<3:0>: Watchdog Timer Period Select bits
Bit Value = Prescale Rate
0000 = 1:32
0001 = 1:64
0010 = 1:128
0011 = 1:256
0100 = 1:512 (Reset value)
0101 = 1:1024
0110 = 1:2048
0111 = 1:4096
1000 = 1:8192
1001 = 1:16384
1010 = 1:32768
1011 = 1:65536
1100 = reserved
1101 = reserved
1110 = reserved
1111 = reserved
SWDTEN: Software Enable or Disable the Watchdog Timer bit
1 = WDT is turned on
0 = WDT is turned off (Reset value)
IRP
SUMMARY OF WATCHDOG TIMER REGISTERS
U-0
WDTCON: WATCHDOG TIMER CONTROL REGISTER
INTEDG
Bit 6
RP1
W = Writable bit
‘1’ = Bit is set
T0CS
Bit 5
RPO
U-0
WDTPS3
Bit 4
T0SE
TO
WDTPS3
R/W-0
WDTPS2
Bit 3
PSA
PD
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTPS2
R/W-1
WSTPS1
Bit 2
PS2
Z
WDTPS0
Bit 1
PS1
DC
WDTPS1
R/W-0
(1)
SWDTEN
Bit 0
PS0
C
© 2008 Microchip Technology Inc.
x = Bit is unknown
WDTPS0
POR, BOR
R/W-0
1111 1111
0001 1xxx
---0 1000
Value on
SWDTEN
Value on all
1111 1111
000q quuu
---0 1000
R/W-0
Resets
other
bit 0
(1)

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