PIC16LC924-04/L Microchip Technology, PIC16LC924-04/L Datasheet - Page 181

• Manufacturer Part Number: PIC16LC924-04/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC924-04/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16LC924-04/LR; PIC16LC924-04/LR

List of Equations And Examples
Example 3-1: Instruction Pipeline Flow............................. 15
Example 4-1: Call of a Subroutine in Page 1 from Page 0 30
Example 4-2: Indirect Addressing ..................................... 30
Example 5-1: Initializing PORTA....................................... 31
Example 5-2: Initializing PORTB....................................... 33
Example 5-3: Initializing PORTC ...................................... 35
Example 5-4: Initializing PORTD ...................................... 36
Example 5-5: Initializing PORTE....................................... 38
Example 5-6: Initializing PORTF....................................... 39
Example 5-7: Initializing PORTG ...................................... 40
Example 5-8: Read-Modify-Write Instructions on an
Example 7-1: Changing Prescaler (Timer0 WDT).......... 49
Example 7-2: Changing Prescaler (WDT Timer0).......... 49
Example 8-1: Reading a 16-bit Free-Running Timer ........ 53
Example 10-1: Changing Between Capture Prescalers...... 58
Example 10-2: PWM Period and Duty Cycle Calculation ... 60
Example 11-1: Loading the SSPBUF (SSPSR) Register.... 65
Equation 12-1: A/D Minimum Charging Time...................... 82
Example 12-1: Calculating the Minimum Required
Example 12-2: Doing an A/D Conversion ........................... 84
Example 12-3: 4-bit vs. 8-bit Conversion Times ................. 85
Example 13-1: Static MUX with 32 Segments .................. 100
Example 13-2: 1/3 MUX with 13 Segments ...................... 100
Example 14-1: Saving STATUS, W, and PCLATH
List of Figures
Figure 3-1:
Figure 3-2:
Figure 3-3:
Figure 4-1:
Figure 4-2:
Figure 4-3:
Figure 4-4:
Figure 4-5:
Figure 4-6:
Figure 4-7:
Figure 4-8:
Figure 4-9:
Figure 4-10:
Figure 5-1:
Figure 5-2:
Figure 5-3:
Figure 5-4:
Figure 5-5:
Figure 5-6:
Figure 5-7:
Figure 5-8:
Figure 5-9:
Figure 5-10:
Figure 5-11:
Figure 7-1:
Figure 7-2:
Figure 7-3:
Figure 7-4:
Figure 7-5:
Figure 7-6:
1997 Microchip Technology Inc.
I/O Port ....................................................... 41
Sample Time............................................... 82
Registers in RAM...................................... 115
PIC16C923 Block Diagram......................... 10
PIC16C924 Block Diagram......................... 11
Clock/Instruction Cycle ............................... 15
Program Memory Map and Stack ............... 17
Register File Map........................................ 18
Status Register (Address 03h, 83h, 103h,
183h)........................................................... 23
OPTION Register (Address 81h, 181h) ...... 24
INTCON Register (Address 0Bh, 8Bh,
10Bh, 18Bh)................................................ 25
PIE1 Register (Address 8Ch) ..................... 26
PIR1 Register (Address 0Ch) ..................... 27
PCON Register (Address 8Eh) ................... 28
Loading of PC In Different Situations.......... 29
Direct/Indirect Addressing........................... 30
Block Diagram of pins RA3:RA0 and RA5.. 31
Block Diagram of RA4/T0CKI Pin ............... 31
Block Diagram of RB3:RB0 Pins ................ 33
Block Diagram of RB7:RB4 Pins ................ 33
PORTC Block Diagram (Peripheral Output
Override)..................................................... 35
PORTD<4:0> Block Diagram...................... 36
PORTD<7:5> Block Diagram...................... 37
PORTE Block Diagram ............................... 38
PORTF Block Diagram ............................... 39
PORTG Block Diagram............................... 40
Successive I/O Operation ........................... 41
Timer0 Block Diagram ................................ 45
Timer0 Timing: Internal Clock/No Prescale 45
Timer0 Timing: Internal Clock/Prescale 1:2 46
Timer0 Interrupt Timing .............................. 46
Timer0 Timing with External Clock ............. 47
Block Diagram of the Timer0/WDT
Prescaler..................................................... 48
Figure 8-1:
Figure 8-2:
Figure 9-1:
Figure 9-2:
Figure 10-1:
Figure 10-2:
Figure 10-3:
Figure 10-4:
Figure 10-5:
Figure 11-1:
Figure 11-2:
Figure 11-3:
Figure 11-4:
Figure 11-5:
Figure 11-6:
Figure 11-7:
Figure 11-8:
Figure 11-9:
Figure 11-10: I
Figure 11-11: Slave-receiver Acknowledge .......................70
Figure 11-12: Data Transfer Wait State.............................70
Figure 11-13: Master-transmitter Sequence ......................71
Figure 11-14: Master-receiver Sequence ..........................71
Figure 11-15: Combined Format........................................71
Figure 11-16: Multi-master Arbitration
Figure 11-17: Clock Synchronization.................................72
Figure 11-18: SSP Block Diagram
Figure 11-19:
Figure 11-20: I
Figure 11-21: Operation of the I
Figure 12-1:
Figure 12-2:
Figure 12-3:
Figure 12-4:
Figure 12-5:
Figure 12-6:
Figure 13-1:
Figure 13-2:
Figure 13-3:
Figure 13-4:
Figure 13-5:
Figure 13-6:
Figure 13-7:
Figure 13-8:
Figure 13-9:
Figure 13-10: Generic LCDD Register Layout...................98
Figure 13-11: Sleep Entry/exit When SLPEN = 1 or
Figure 13-12: LCDSE Register (Address 10Dh)............. 100
Figure 13-13: Charge Pump and Resistor Ladder.......... 101
Figure 14-1:
Figure 14-2:
Figure 14-3:
T1CON: Timer1 Control Register (Address
10h) .............................................................51
Timer1 Block Diagram.................................52
Timer2 Block Diagram.................................55
T2CON: Timer2 Control Register (Address
12h) .............................................................55
CCP1CON Register (Address 17h).............57
Capture Mode Operation Block Diagram ....58
Compare Mode Operation Block Diagram ..58
Simplified PWM Block Diagram...................59
PWM Output................................................59
SSPSTAT: Sync Serial Port Status Register
(Address 94h)..............................................63
SSPCON: Sync Serial Port Control Register
(Address 14h)..............................................64
SSP Block Diagram (SPI Mode)..................65
SPI Master/Slave Connection .....................66
SPI Mode Timing, Master Mode..................67
SPI Mode Timing
(Slave Mode With CKE = 0) ........................67
SPI Mode Timing
(Slave Mode With CKE = 1) ........................68
Start and Stop Conditions ...........................69
7-bit Address Format...................................70
(Two Masters) .............................................72
(I
(7-bit Address).............................................75
(7-bit Address).............................................76
RCV_MODE or XMIT_MODE .....................78
ADCON0 Register (Address 1Fh) ...............79
ADCON1 Register (Address 9Fh) ...............80
A/D Block Diagram ......................................81
Analog Input Model .....................................82
A/D Transfer Function .................................87
Flowchart of A/D Operation .........................88
LCDCON Register (Address 10Fh) .............89
LCD Module Block Diagram ........................90
LCDPS Register (Address 10Eh) ................90
Waveforms in Static Drive ...........................91
Waveforms in 1/2 MUX, 1/3 Bias Drive .......92
Waveforms in 1/3 MUX, 1/3 Bias ................93
Waveforms in 1/4 MUX, 1/3 Bias ................94
LCD Clock Generation ................................95
Example Waveforms in 1/4 MUX Drive .......97
CS1:CS0 = 00 .............................................99
Configuration Word .................................. 103
Crystal/Ceramic Resonator Operation
(HS, XT or LP OSC Configuration)........... 104
External Clock Input Operation
(HS, XT or LP OSC Configuration)........... 104
2
I
2
2
2
C 10-bit Address Format...........................70
C Waveforms for Transmission
C Waveforms for Reception
C Mode)...................................................73
PIC16C9XX
2
C Module in IDLE_MODE,
DS30444E - page 181