PIC18C601-I/L Microchip Technology, PIC18C601-I/L Datasheet - Page 166

• Manufacturer Part Number: PIC18C601-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C601-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Type: ROMless
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: 3-Wire, I2C, SPI, USART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCCXLT68L1 - SOCKET TRANSITION ICE 68PLCCAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C601I/L

PIC18C601/801
15.4.7
A Repeated START condition occurs when the RSEN
bit (SSPCON2 register) is programmed high and the
I
bit is set, the SCL pin is asserted low. When the SCL
pin is sampled low, the baud rate generator is loaded
with the contents of SSPADD<5:0> and begins count-
ing. The SDA pin is released (brought high) for one
baud rate generator count (T
generator times out, if SDA is sampled high, the SCL pin
will be de-asserted (brought high). When SCL is sam-
pled high, the baud rate generator is re-loaded with the
contents of SSPADD<6:0> and begins counting. SDA
and SCL must be sampled high for one T
action is then followed by assertion of the SDA pin (SDA
= 0) for one T
RSEN bit (SSPCON2 register) will be automatically
cleared and the baud rate generator will not be reloaded,
leaving the SDA pin held low. As soon as a START con-
dition is detected on the SDA and SCL pins, the S bit
(SSPSTAT register) will be set. The SSPIF bit will not be
set until the baud rate generator has timed out.
FIGURE 15-14:
DS39541A-page 166
2
C logic module is in the IDLE state. When the RSEN
Note 1: If RSEN is programmed while any other
2: A bus collision during the Repeated
I
START CONDITION TIMING
event is in progress, it will not take effect.
START condition occurs, if:
• SDA is sampled low when SCL goes
• SCL goes low before SDA is
2
BRG ,
C MASTER MODE REPEATED
from low to high.
asserted low. This may indicate that
another master is attempting to
transmit a data "1".
Falling edge of ninth clock
while SCL is high. Following this, the
REPEATED START CONDITION WAVEFORM
SDA
SCL
End of Xmit
BRG
). When the baud rate
Write to SSPCON2
occurs here.
SDA = 1,
SCL (no change)
Advance Information
BRG
. This
T
SDA = 1,
SCL = 1
BRG
T
BRG
Immediately following the SSPIF bit getting set, the
user may write the SSPBUF with the 7-bit address in
7-bit mode, or the default first address in 10-bit mode.
After the first eight bits are transmitted and an ACK is
received, the user may then transmit an additional
eight bits of address (10-bit mode) or eight bits of data
(7-bit mode).
15.4.7.1
If the user writes the SSPBUF when a Repeated
START sequence is in progress, the WCOL is set and
the contents of the buffer are unchanged (the write
doesn’t occur).
Sr = Repeated START
T
Note:
BRG
At completion of START bit,
hardware clear RSEN bit
Set S (SSPSTAT<3>)
and set SSPIF
Write to SSPBUF occurs here
WCOL Status Flag
Because queueing of events is not
allowed, writing of the lower 5 bits of
SSPCON2 is disabled until the Repeated
START condition is complete.
T
BRG
1st Bit
T
BRG
2001 Microchip Technology Inc.