PIC18F4320-E/PT Microchip Technology, PIC18F4320-E/PT Datasheet - Page 191
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F4320-E/PT
Manufacturer Part Number
PIC18F4320-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18F1320-ISS.pdf
(36 pages)
4.PIC18F2220-ISO.pdf
(394 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(8 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
9.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F4320-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4320-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18F1320-ISS PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- PIC18F2220-ISO PDF datasheet #9
- Current page: 191 of 394
- Download datasheet (7Mb)
17.4.14
While in any power-managed mode, the I
can receive addresses or data and when an address
match or complete byte transfer occurs, wake the
processor from Sleep (if the MSSP interrupt is
enabled).
17.4.15
A Reset disables the MSSP module and terminates the
current transfer.
17.4.16
In Multi-Master mode, the interrupt generation on the
detection of the Start and Stop conditions allows the
determination of when the bus is free. The Stop (P) and
Start (S) bits are cleared from a Reset or when the
MSSP module is disabled. Control of the I
be taken when the P bit (SSPSTAT<4>) is set or the
bus is idle with both the S and P bits clear. When the
bus is busy, enabling the MSSP interrupt will generate
the interrupt when the Stop condition occurs.
In multi-master operation, the SDA line must be moni-
tored for arbitration to see if the signal level is the
expected output level. This check is performed in
hardware with the result placed in the BCLIF bit.
The states where arbitration can be lost are:
• Address Transfer
• Data Transfer
• A Start Condition
• A Repeated Start Condition
• An Acknowledge Condition
FIGURE 17-25:
© 2007 Microchip Technology Inc.
SDA
SCL
BCLIF
POWER-MANAGED MODE
OPERATION
EFFECT OF A RESET
MULTI-MASTER MODE
BUS COLLISION TIMING FOR TRANSMIT AND ACKNOWLEDGE
Data changes
while SCL = 0
2
2
C bus may
C module
PIC18F2220/2320/4220/4320
SDA released
by master
SDA line pulled low
by another source
17.4.17
Multi-Master mode support is achieved by bus arbitra-
tion. When the master outputs address/data bits onto
the SDA pin, arbitration takes place when the master
outputs a ‘1’ on SDA by letting SDA float high and
another master asserts a ‘0’. When the SCL pin floats
high, data should be stable. If the expected data on
SDA is a ‘1’ and the data sampled on the SDA pin = 0,
then a bus collision has taken place. The master will set
the Bus Collision Interrupt Flag, BCLIF, and reset the
I
If a transmit was in progress when the bus collision
occurred, the transmission is halted, the BF flag is
cleared, the SDA and SCL lines are deasserted and the
SSPBUF can be written to. When the user services the
bus collision Interrupt Service Routine, and if the I
bus is free, the user can resume communication by
asserting a Start condition.
If a Start, Repeated Start, Stop or Acknowledge condition
was in progress when the bus collision occurred, the con-
dition is aborted, the SDA and SCL lines are deasserted,
and the respective control bits in the SSPCON2 register
are cleared. When the user services the bus collision
Interrupt Service Routine, and if the I
user can resume communication by asserting a Start
condition.
The master will continue to monitor the SDA and SCL
pins. If a Stop condition occurs, the SSPIF bit will be set.
A write to the SSPBUF will start the transmission of
data at the first data bit regardless of where the
transmitter left off when the bus collision occurred.
In Multi-Master mode, the interrupt generation on the
detection of Start and Stop conditions allows the determi-
nation of when the bus is free. Control of the I
be taken when the P bit is set in the SSPSTAT register or
the bus is Idle and the S and P bits are cleared.
2
C port to its Idle state (Figure 17-25).
MULTI -MASTER COMMUNICATION,
BUS COLLISION AND BUS
ARBITRATION
Sample SDA. While SCL is high,
data doesn’t match what is driven
by the master.
Bus collision has occurred.
Set Bus Collision
Interrupt Flag (BCLIF)
DS39599G-page 189
2
C bus is free, the
2
C bus can
2
C
Related parts for PIC18F4320-E/PT
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![PIC18F-LF1XK50](/images/no-image3.png)
Part Number:
Description:
20-Pin USB Flash Microcontrollers
Manufacturer:
MICROCHIP [Microchip Technology]
Datasheet:
![PIC18F6393T-I/PT](/photos/6/81/68123/c04-066_pf_tmb.jpg)
Part Number:
Description:
PIC18F With 128-segment LCD Driver And 12-bit ADC, 8KB Flash, 768B RAM, CCP, MSS
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F6493T-I/PT](/photos/6/81/68123/c04-066_pf_tmb.jpg)
Part Number:
Description:
PIC18F With 128-segment LCD Driver And 12-bit ADC, 16KB Flash, 768B RAM, CCP, MS
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F8393T-I/PT](/images/manufacturer_photos/0/4/439/microchip_technology_tmb.jpg)
Part Number:
Description:
PIC18F With 192-segment LCD Driver And 12-bit ADC, 8KB Flash, 768B RAM, CCP, MSS
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F8493T-I/PT](/images/manufacturer_photos/0/4/439/microchip_technology_tmb.jpg)
Part Number:
Description:
PIC18F With 192-segment LCD Driver And 12-bit ADC, 16KB Flash, 768B RAM, CCP, MS
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F6585-I/L](/photos/16/12/161282/68-plcc-large-300dpi-lyrd_tmb.jpg)
Part Number:
Description:
Microcontrollers (MCU) 48KB 3328 RAM 52 I/O
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F6680-I/L](/photos/16/12/161282/68-plcc-large-300dpi-lyrd_tmb.jpg)
Part Number:
Description:
Microcontrollers (MCU) 64KB 3328 RAM 52 I/O
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F65K90T-I/MR](/photos/16/3/160368/qfn64_tmb.jpg)
Part Number:
Description:
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F65K90T-I/PT](/photos/16/3/160367/tqfp-64_tmb.jpg)
Part Number:
Description:
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm T/R
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F87K90T-I/PT](/photos/40/31/403173/tqfp-80_tmb.jpg)
Part Number:
Description:
128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm T/
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F65K90-I/MR](/photos/16/3/160368/qfn64_tmb.jpg)
Part Number:
Description:
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm TUBE
Manufacturer:
Microchip Technology
Datasheet:
![PIC18F65K90-I/PT](/photos/16/3/160367/tqfp-64_tmb.jpg)
Part Number:
Description:
32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm TRAY
Manufacturer:
Microchip Technology
![PIC18F87K90-I/PT](/photos/40/31/403173/tqfp-80_tmb.jpg)
Part Number:
Description:
128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TR
Manufacturer:
Microchip Technology