PIC18F6520-E/PT Microchip Technology, PIC18F6520-E/PT Datasheet - Page 268

• Manufacturer Part Number: PIC18F6520-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6520-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6520/8520/6620/8620/6720/8720
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39609B-page 266
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Carry bit =
REG
W
Carry bit =
REG
W
Q1
=
=
=
=
register ‘f’
ADD W and Carry bit to f
[ label ] ADDWFC
0
d
a
(W) + (f) + (C)
N, OV, C, DC, Z
Add W, the Carry flag and data
memory location ‘f’. If ‘d’ is ‘0’, the
result is placed in W. If ‘d’ is ‘1’, the
result is placed in data memory
location ‘f’. If ‘a’ is ‘0’, the Access
Bank will be selected. If ‘a’ is ‘1’, the
BSR will not be overridden.
1
1
ADDWFC
Read
Q2
0010
1
0x02
0x4D
0
0x02
0x50
f
[0,1]
[0,1]
255
00da
REG, 0, 1
Process
Data
Q3
dest
ffff
f [,d [,a]
destination
Write to
Q4
ffff
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
Read literal
=
=
AND literal with W
[ label ] ANDLW
0
(W) .AND. k
N, Z
The contents of W are AND’ed with
the 8-bit literal ‘k’. The result is
placed in W.
1
1
ANDLW
0000
Q2
‘k’
0xA3
0x03
k
 2004 Microchip Technology Inc.
255
1011
0x5F
Process
Data
Q3
W
k
kkkk
Write to W
Q4
kkkk