PIC18F6520-E/PT Microchip Technology, PIC18F6520-E/PT Datasheet - Page 280

• Manufacturer Part Number: PIC18F6520-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6520-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6520/8520/6620/8620/6720/8720
DAW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example1:
Example 2:
DS39609B-page 278
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
DC
W
C
DC
W
C
DC
W
C
DC
Q1
=
=
=
=
=
=
=
=
=
=
=
=
register W
Decimal Adjust W Register
[ label ] DAW
None
If [W<3:0> >9] or [DC = 1] then
(W<3:0>) + 6
else
(
If [W<7:4> >9] or [C = 1] then
(
else
(W<7:4>)
C
DAW adjusts the eight-bit value in
W, resulting from the earlier
addition of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
1
1
DAW
W<3:0>)
W<7:4>) + 6
Read
0000
Q2
0xA5
0
0
0x05
1
0
0xCE
0
0
0x34
1
0
0000
Process
W<7:4>;
W<3:0>;
Data
Q3
W<3:0>;
W<7:4>;
0000
Write
Q4
W
0111
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register ‘f’
Decrement f
[ label ] DECF f [,d [,a]
0
d
a
(f) – 1
C, DC, N, OV, Z
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in W. If ‘d’ is ‘1’,
the result is stored back in register
‘f’ (default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
DECF
Read
0000
Q2
0x01
0
0x00
1
f
[0,1]
[0,1]
 2004 Microchip Technology Inc.
255
dest
CNT,
01da
Process
Data
Q3
1, 0
ffff
destination
Write to
Q4
ffff