PIC18LF1330-I/ML Microchip Technology, PIC18LF1330-I/ML Datasheet - Page 12
![Microcontroller](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF1330-I/ML
Manufacturer Part Number
PIC18LF1330-I/ML
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
Specifications of PIC18LF1330-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- Current page: 12 of 318
- Download datasheet (3Mb)
PIC18F1230/1330
FIGURE 1-1:
DS39758D-page 12
Note 1:
Program Memory
Address Latch
PIC18F1330
PIC18F1230
(4 Kbytes)
Data Latch
(8 Kbytes)
V
MCLR
OSC1
OSC2
DD
T1OSO
T1OSI
2:
3:
4:
Timer0
, V
16
21
SS
(2)
(2)
(1)
RA5 is available only when the MCLR Reset is disabled.
OSC1, OSC2, CLKI and CLKO are only available in select oscillator modes and when these pins are not being
used as digital I/O. Refer to Section 3.0 “Oscillator Configurations” for additional information.
Placement of T1OSI and T1OSO/T1CKI depends on the value of the Configuration bit, T1OSCMX, of CONFIG3H.
Placement of FLTA depends on the value of the Configuration bit, FLTAMX, of CONFIG3H.
Data EEPROM
21
Generation
21
Programming
Oscillator
Low-Voltage
PIC18F1230/1330 (18-PIN) BLOCK DIAGRAM
Table Latch
Timing
INTRC
Debugger
Instruction
In-Circuit
Decode &
Control
Table Pointer <2>
inc/dec logic
Timer1
8
20
Start-up Timer
Clock Monitor
PCLATU
ROM Latch
Instruction
Watchdog
Brown-out
Power-up
Power-on
Oscillator
Fail-Safe
Register
PCU
Reset
Program Counter
Timer
Timer
Reset
A/D Converter
31 Level Stack
8
10-Bit
PCLATH
PCH PCL
8
PCPWM
8
Reference
Precision
Voltage
Decode
BIT OP
8
BSR
4
8
3
Address Latch
Address<12>
12
PRODH
inc/dec
8
Data Latch
Data RAM
FSR0
FSR1
FSR2
WREG
logic
8 x 8 Multiply
Enhanced
ALU<8>
USART
8
BOR
LVD
Data Bus<8>
12
8
Bank0, F
PRODL
4
12
8
8
8
PORTB
PORTA
2009 Microchip Technology Inc.
RA6/OSC2
T1OSO
RA7/OSC1
RA0/AN0/INT0/KBI0/CMP0
RA1/AN1/INT1/KBI1
RA2/TX/CK
RA3/RX/DT
RA4/T0CKI/AN2/V
MCLR/V
T1OSI
RB0/PWM0
RB1/PWM1
RB2/INT2/KBI2/CMP2/
T1OSO
RB3/INT3/KBI3/CMP1/
T1OSI
RB4/PWM2
RB5/PWM3
RB6/PWM4/PGC
RB7/PWM5/PGD
(3)
(3)
(3)
(3)
PP
/FLTA
/T1CKI
/T1CKI
/RA5
(2)
(2)
/CLKI
/CLKO
(4)
(1)
(3)
(3)
/FLTA
(2)
REF
/AN3
(2)
/
/
+
(4)
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