ATS682LSHTN-T Allegro Microsystems Inc, ATS682LSHTN-T Datasheet - Page 12

• Manufacturer Part Number: ATS682LSHTN-T
• Description: IC HALL EFFECT SENSOR 4SIP
• Manufacturer: Allegro Microsystems Inc
• Type: Linear Field Sensorr

Specifications of ATS682LSHTN-T

• Package / Case: 4-SIP
• Sensing Range: 120mV Trip, 120mV Release
• Voltage - Supply: 4 V ~ 24 V
• Current - Supply: 16.8mA
• Output Type: Analog
• Features: Gear Tooth Type
• Operating Temperature: -40°C ~ 150°C
• Bandwidth: 40kHz
• Supply Voltage Max: 24V
• Hall Effect Type: Gear Tooth
• Operating Temperature Range: -40°C To +150°C
• Supply Voltage Min: 4V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 620-1327-2

ATS682LSH
Device Operation
Power-On When power (V
device, a short period of time is required to activate the various
portions of the IC. During this period, the ATS682 powers-on in
the high current state, I
tions that could induce a change in the output state. Such an event
could be caused by thermal transients, but it would also require a
static applied magnetic field, proper signal polarity, and particular
direction and magnitude of internal signal drift.
Initial Offset Adjust The IC initially compensates for differ-
ential offset, ΔB
lation alignment. Once the effective differential magnetic offset
has been cancelled, the digital tracking DAC is ready to track the
signal and provide output switching.
The period of time required for both power-on and initial offset
adjust is defined as the Power-On Time specification.
Calibration Mode The calibration mode allows the IC to auto-
matically select the proper signal gain and continue to adjust for
Figure 9: Operation of Running Mode Gain Adjust.
Position 1. The device is initially powered-on. Self-calibration occurs.
Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The amplitude of V
the switching hysteresis (B
Position 3. The calibration period completes on the third rising output edge, and the device enters Running mode.
Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The established signal gain is too large for
the rotational magnetic signal of the target, at the given air gap.
Position 5. Running mode calibration corrects the signal gain to an optimal level for the installation air gap.
Internal Differential
Signal, V
IC Electrical
Output, I
APP
, that results from chip, magnet, and instal-
OUT
CC(HIGH)
PROC
OP
and B
CC
. After power-on, there are condi-
RP
> V
1
), and the device output switches.
CC
(min)) is applied to the
2
B
OP
B
RP
Miniature, Two-Wire, True Zero Speed
Differential Peak-Detecting Sensor IC
3
DC differential magnetic offset. The AGC is active, and selects
the optimal signal gain based on the amplitude of the V
signal. Following each adjustment to the AGC DAC, the Offset
DAC is also adjusted to ensure the internal analog signal is prop-
erly centered. During this mode, the tracking DAC is active and
output switching occurs, but the duty cycle is not guaranteed to
be within specification.
Running Mode After the initial calibration process (CAL
edges) establishes a signal gain, the device moves to Running
mode. During Running mode, the IC tracks the input signal and
continues to give an output edge for every peak of the signal.
AOA remains active to compensate for any offset drift over time.
The ATS682 also incorporates an algorithm for adjusting the
signal gain during Running mode. This algorithm is designed to
optimize the V
netic signal during the calibration period is not representative of
the amplitude of the magnetic signal for the installed application
air gap (see figure 9).
4
PROC
signal amplitude in instances where the mag-
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Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
5
B
OP
B
RP
PROC
is greater than
PROC
I
12