CDB6420 Cirrus Logic Inc, CDB6420 Datasheet - Page 41
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CDB6420
Manufacturer Part Number
CDB6420
Description
Development Kit
Manufacturer
Cirrus Logic Inc
Datasheet
1.CDB6420.pdf
(52 pages)
Specifications of CDB6420
Silicon Manufacturer
Cirrus Logic
Application Sub Type
Speakerphone
Kit Application Type
Audio / Video / TV
Silicon Core Number
CS6420
Kit Contents
Board
Kit Features
Analog And Digital Patch Area
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
HARDWARE
Power Supplies
The CDB6420 power supply circuitry is shown in
Figure 1. The evaluation board expects a clean
+5V DC power supply to be applied to the +5VA
binding post. This powers the analog components
of the evaluation board. Power for the digital com-
ponents is derived through a ferrite bead to filter
out the high frequency components.
Analog Signal Connections
Figure 2 shows the RCA connectors for the analog
signals. These RCA connectors connect directly to
the test points with the same names. All the con-
nectors have a nominal maximum input and output
voltage of 2.8 V
output impedance at the connector and have a low-
pass corner at 4 kHz. APO_IN and NI both have
input anti-aliasing filters with corners at 8 kHz, and
an nominal input impedance of 6 k .
DS205DB1
Figure 2. RCA Connections
Figure 1. Power Supply
pp
. NO and AO present 12 k
of
Microphone Bias
A constant current source providing the necessary
bias for electret microphones is shown in Figure 3.
A 1/8" stereo microphone jack (J8) is provided for
easy connection to microphones with 1/8" plugs.
HDR3 provides an easy way to connect a micro-
phone with bare wires. The stereo microphone jack
is self-shorting, so when connecting to the test
point MICIN or HDR4, make sure that either a plug
is in the jack, or the trace from the jack has been cut
(HDR4 is a convenient place to do this).
Speaker Driver
A speaker driver circuit, implemented with a Mo-
torola MC34119, is shown in Figure 4. This circuit
provides 6.4 V
terminals (J1 and J2). This circuit can drive down
to an 8
speaker driver must be connected to AO by HDR3.
This will connect the speaker driver to AO, but in
doing so will create a voltage divider at the AO test
point resulting in a 1.4 V
AO test point and connector. The CDB6420 is
shipped with the speaker driver enabled by default.
In order to disable the speaker driver, remove the
jumper shorting HDR3. This will result in the con-
nection between AO and the speaker driver input
being broken and allowing the signal at the AO test
point and connector to swing to its full extreme of
2.8 V
CS6420
The heart of the CDB6420, the CS6420 Full-Du-
plex Speakerphone Chip, is shown in Figure 5. The
outputs AO and NO are shown with the output low-
pass filters that remove the high frequency compo-
nents from the delta-sigma DACs. The inputs
APO_IN and NI are shown with the anti-aliasing
network they require.
When using APO as the input, the CS6420 does not
use the on-chip 34 dB preamplifier. HDR1 must be
changed to the PREAMP OFF (1-2) position when
pp
full-scale.
load. When using the speaker driver, the
pp
differentially to the SPEAKER
pp
full-scale swing at the
CDB6420
41