S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 568

• Manufacturer Part Number: S1D15206F00A200
• Description: LCD Drivers LCD DRIVER
• Manufacturer: Epson

Specifications of S1D15206F00A200

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Oscillation circuit
The S1D15B01 series has a complete on-chip CR
oscillation circuit, and its output is used as the display
timing signal source.
The on-chip oscillation circuit is available when CL =
HIGH.
And the S1D15B01 series is also capable external clock
input from CL pin. (When external clock is halted, CL
must be LOW.)
Display timing generator circuit
The display timing generator circuit generates the timing
signals from the display clocks to the line address circuit
2-frame AC drive waveforms
Rev. 1.1a
COM0
COM1
DATA
SEGn
RAM
FR
C
L
64
65 1
2
3
4
5
6
EPSON
Figure 6
60 61 62 63 64 65 1
and the display data latch circuit. The display data is
latched to the display data latch circuit and is output to
the segment drive output pin by synchronizing to the
display clocks. The read operation of display data to the
liquid crystal drive circuit is completely independent of
the access to the display data RAM from MPU. Therefore
even when the display data RAM is asynchronously
accessed during liquid crystal display, the access will
not have any adverse effect on the display such as
flickering.
The circuit also generates COM scan signal and the
LCD AC signal (FR) from the display clocks. As shown
in Figure 6, the FR normally generates the 2- frame AC
drive waveforms .
2
3
4
S1D15B01 Series
5
6
V
V
V
V
V
V
V
V
V
V
V
V
0
1
4
SS
0
1
4
SS
0
2
3
SS
13–13