BD8381EFV-E2 Rohm Semiconductor, BD8381EFV-E2 Datasheet - Page 7

• Manufacturer Part Number: BD8381EFV-E2
• Description: LED Drivers AUTOMOTIVE GRADE LED DRIVER
• Manufacturer: Rohm Semiconductor

Specifications of BD8381EFV-E2

• Operating Supply Voltage: 5 V to 30 V
• Maximum Supply Current: 7 mA
• Maximum Power Dissipation: 1.45 W
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: HTSSOP-28
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

・Self-diagnostic functions
・Operation of the Protection Circuitry
・Short Circuit Protection (SCP)
・LED Open Detection
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BD8381EFV-M
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・ Over Voltage Protection (OVP)
・Under-Voltage Lock Out (UVLO)
・Thermal Shut Down (TSD)
・Over Current Protection (OCP)
When the FB-pin voltage becomes less than 0.05V (TYP), the internal counter starts operating and latches off the circuit
approximately after 140ms (when CT = 0.1uF). If the FB-pin voltage becomes over 0.05V before 140ms, then the counter
resets.
When the LED anode (i.e. DCDC output voltage) is shorted to ground, then the LED current becomes off and the FB-pin
voltage becomes low. Furthermore, the LED current also becomes off when the LED cathode is shorted to ground. Hence in
summary, the SCP works with both cases of the LED anode and the cathode being shorted.
When the LED-pin voltage ≤ 0.05V (TYP) as well as OVP-pin voltage ≥ 1.7V (TYP) simultaneously, the device detects as
LED open and latches off that particular channel.
The operating status of the built-in protection circuitry is propagated to FAIL1 and FAIL2 pins (open-drain outputs). FAIL1
becomes low when UVLO, TSD, OVP, or SCP protection is engaged, whereas FAIL2 becomes low when open or short LED
is detected.
The OCP detects the current through the power-FET by monitoring the voltage of the high-side resistor, and activates
when the CS voltage becomes less than VCC-0.6V (TYP).
When the OCP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the
DCDC turns off.
The output voltage of the DCDC is detected with the OVP-pin voltage, and the protection activates when the OVP-pin
voltage becomes greater than 2.0V (TYP).
When the OVP is activated, the external capacitor of the SS pin becomes discharged and the switching operation of the
DCDC turns off.
The UVLO shuts down all the circuits other than REG when VREG ≦ 4.3V (TYP).
The TSD shuts down all the circuits other than REG when the Tj reaches 175℃ (TYP), and releases when the Tj
becomes below 150℃ (TYP).
SCP
UVLO/TSD
EN=Low
Counter
S
R
UVLO
OVP
OCP
TSD
Q
7/20
FAIL1
SHORT
OPEN
MASK
UVLO/TSD
EN=Low
S
R
2010.10 - Rev.0.11
Q
Technical Note
FAIL2