LS-XP10-BASE-PC-N Lattice, LS-XP10-BASE-PC-N Datasheet - Page 27
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LS-XP10-BASE-PC-N
Manufacturer Part Number
LS-XP10-BASE-PC-N
Description
MCU, MPU & DSP Development Tools ispLEVER Base Lattic eXP-10 Std Dev Kit
Manufacturer
Lattice
Datasheet
1.M4A5-6432-10JNC.pdf
(62 pages)
Specifications of LS-XP10-BASE-PC-N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 27 of 62
- Download datasheet (2Mb)
BLOCK DIAGRAM – M4A(3,5)-64/32
2
2
2
2
4
4
4
4
8
8
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
I/O8–I/O15
Block A
Output Switch
Output Switch
Block B
I/O0–I/O7
Macrocells
66 X 90
66 X 90
Macrocells
33
16
33
16
16
16
I/O Cells
I/O Cells
8
8
8
8
Matrix
Matrix
ispMACH 4A Family
Central Switch Matrix
16
24
24
16
16
16
2
2
4
4
4
4
8
8
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
I/O16–I/O23
I/O24–I/O31
Output Switch
Output Switch
Block D
Block C
Macrocells
66 X 90
66 X 90
Macrocells
33
33
16
I/O Cells
16
16
16
I/O Cells
8
8
8
8
Matrix
Matrix
16
24
24
16
16
16
17466H-020
27
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