AD7477ARTZ-REEL7 Analog Devices Inc, AD7477ARTZ-REEL7 Datasheet - Page 21

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AD7477ARTZ-REEL7

Manufacturer Part Number
AD7477ARTZ-REEL7
Description
IC,A/D CONVERTER,SINGLE,10-BIT,CMOS,TSOP,6PIN
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7477ARTZ-REEL7

Number Of Bits
10
Sampling Rate (per Second)
1M
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
17.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7477CBZ - BOARD EVALUATION FOR AD7477
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
To summarize,
It should be noted that for signal processing applications, it is
imperative that the frame synchronization signal from the DSP563xx
will provide equidistant sampling.
APPLICATION HINTS
Grounding and Layout
The printed circuit board that houses the AD7476A/AD7477A/
AD7478A should be designed such that the analog and digi-
tal sections are separated and confined to certain areas of the
board. This facilitates the use of ground planes that can be
separated easily. A minimum etch technique is generally best
for ground planes because it gives the best shielding. Digital and
analog ground planes should be joined at only one place. If the
AD7476A/AD7477A/AD7478A is in a system where multiple
devices require an AGND to DGND connection, the connection
should still be made at one point only, a star ground point that
should be established as close as possible to the AD7476A/
AD7477A/AD7478A.
Avoid running digital lines under the device as these will couple
noise onto the die. The analog ground plane should be allowed to
run under the AD7476A/AD7477A/AD7478A to avoid noise
coupling. The power supply lines to the AD7476A/AD7477A/
AD7478A should use as large a trace as possible to provide low
impedance paths and reduce the effects of glitches on the power
supply line. Fast switching signals like clocks should be shielded
with digital grounds to avoid radiating noise to other sections of
the board, and clock signals should never be run near the analog
inputs. Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each other.
This will reduce the effects of feedthrough through the board.
A microstrip technique is by far the best but is not always possible
with a double-sided board. In this technique, the component side
of the board is dedicated to ground planes while signals are placed
on the solder side.
Good decoupling is also very important. The supply should be
decoupled with, for instance, a 680 nF 0805 to GND. When using
the SC70 package in applications where the size of the compo-
nents is of concern, a 220 nF 0603 capacitor, for example, could
be used instead. However, in that case, the decoupling may not be
as effective and may result in an approximate SINAD degradation
of 0.3 dB. To achieve the best performance from these decoupling
REV. C
MOD = 0
SYN = 1
WL2, WL1, and WL0 depend on the word length
FSL1 = 1 and FSL0 = 0
FSP = 1, Negative Frame Sync
SCD2 = 1
SCKD = 1
SHFD = 0
AD7476A/
AD7477A
AD7478A*
Figure 19. Interfacing to the DSP563xx
*ADDITIONAL PINS OMITTED FOR CLARITY
SDATA
SCLK
CS
SCK
SRD
SC2
DSP563xx*
–21–
components, the user should endeavor to keep the distance
between the decoupling capacitor and the V
minimum with short track lengths connecting the respective pins.
Figures 20 and 21 show the recommended positions of the decou-
pling capacitor for the MSOP and SC70 packages, respectively.
As can be seen in Figure 20, for the MSOP package, the decoup-
ling capacitor has been placed as close as possible to the IC with
short track lengths to V
could also be placed on the underside of the PCB directly under-
neath the IC, between the V
This method is not recommended on PCBs above a standard
1.6 mm thickness. The best performance will be seen with the
decoupling capacitor on the top of the PCB next to the IC.
Similarly, for the SC70 package, the decoupling capacitor
should be located as close as possible to the V
pins. Because of its pinout, i.e., V
decoupling capacitor can be placed extremely close to the IC.
The decoupling capacitor could be placed on the underside of
the PCB directly under the V
the best performance will be achieved with the decoupling
capacitor on the same side as the IC.
Evaluating the AD7476A/AD7477A Performance
The evaluation board package includes a fully assembled and tested
evaluation board, documentation, and software for controlling
the board from the PC via the EVAL-BOARD CONTROLLER.
The EVAL-BOARD CONTROLLER can be used in conjunction
with the AD7476ACB/AD7477ACB evaluation board, as well
as many other Analog Devices evaluation boards ending in the
CB designator, to demonstrate/evaluate the ac and dc performance
of the AD7476A/AD7477A.
The software allows the user to perform ac (fast Fourier transform)
and dc (histogram of codes) tests on the AD7476A/AD7477A. See
the evaluation board application note for more information.
Figure 20. Recommended Supply Decoupling Scheme
for the AD7476A/AD7477A/AD7478A MSOP Package
Figure 21. Recommended Supply Decoupling Scheme
for the AD7476A/AD7477A/AD7478A SC70 Package
AD7476A/AD7477A/AD7478A
DD
and GND pins. The decoupling capacitor
DD
DD
and GND pins attached by vias.
and GND pins, but as before,
DD
being next to GND, the
DD
and GND pins to a
DD
and the GND

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