AD7730LBR Analog Devices Inc, AD7730LBR Datasheet - Page 48
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
AD7730LBR
Manufacturer Part Number
AD7730LBR
Description
A/D Converter (A-D) IC
Manufacturer
Analog Devices Inc
Datasheet
1.AD7730LBRUZ.pdf
(52 pages)
Specifications of AD7730LBR
Peak Reflow Compatible (260 C)
No
No. Of Bits
24 Bit
Leaded Process Compatible
No
Features
Bridge Transducer, Compl. Anal. Front-End
Package / Case
24-SOIC
Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
600
Data Interface
DSP, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
125mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7730LEBZ - BOARD EVALUATION FOR AD7730EVAL-AD7730EBZ - BOARD EVAL FOR AD7730
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD7730LBRUZ
Manufacturer:
ADI
Quantity:
1 000
Company:
Part Number:
AD7730LBRUZ-REEL7
Manufacturer:
ADI
Quantity:
1 000
Part Number:
AD7730LBRZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7730LBRZ-REEL
Manufacturer:
AD
Quantity:
1 000
AD7730/AD7730L
OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7730L can be programmed to operate in either chop mode or nonchop mode. The chop mode can be enabled in ac-excited
or dc-excited applications; it is optional in dc-excited applications, but chop mode must be enabled in ac-excited applications. These
options are discussed in more detail in earlier sections. The chop mode has the advantage of lower drift numbers and better noise
immunity, but the noise is approximately 20% higher for a given –3 dB frequency and output data rate. It is envisaged that the major-
ity of weigh-scale users of the AD7730L will operate the part in chop mode to avail themselves of the excellent drift performance and
noise immunity when chopping is enabled. The following tables outline the noise performance of the part in both chop and nonchop
modes over all input ranges for a selection of output rates.
Output Noise (CHP = 1)
This mode is the primary mode of operation of the device. Table XXI shows the output rms noise for some typical output update
rates and –3 dB frequencies for the AD7730 when used in chopping mode (CHP of Filter Register = 1) with a master clock
frequency of 2.4576 MHz. These numbers are typical and are generated at a differential analog input voltage of 0 V. The output
update rate is selected via the SF0 to SF11 bits of the Filter Register. Table XXII, meanwhile, shows the output peak-to-peak resolu-
tion in counts for the same output update rates. The numbers in brackets are the effective peak-to-peak resolution in bits (rounded to
the nearest 0.5 LSB). It is important to note that the numbers in Table XXII represent the resolution for which there will be no code
flicker within a six-sigma limit. They are not calculated based on rms noise, but on peak-to-peak noise.
The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the
same as the equivalent bipolar input range. As a result, the numbers in Table XXI will remain the same for unipolar ranges while the
numbers in Table II will change. To calculate the numbers for Table XXII for unipolar input ranges simply divide the peak-to-peak
resolution number in counts by two or subtract one from the peak-to-peak resolution number in bits.
Output
Data Rate Frequency
25 Hz
50 Hz
75 Hz
100 Hz*
200 Hz
*Power-On Default
Output
Data Rate Frequency
25 Hz
50 Hz
75 Hz
100 Hz*
200 Hz
*Power-On Default
Output Noise (CHP = 0)
Table XXIII shows the output rms noise for some typical output update rates and –3 dB frequencies for the AD7730L when used in
nonchopping mode (CHP of Filter Register = 0) with a master clock frequency of 2.4576 MHz. These numbers are typical and are
generated at a differential analog input voltage of 0 V. The output update rate is selected via the SF0 to SF11 bits of the Filter Regis-
ter. Table XXIV, meanwhile, shows the output peak-to-peak resolution in counts for the same output update rates. The numbers in
brackets are the effective peak-to-peak resolution in bits (rounded to the nearest 0.5 LSB). It is important to note that the numbers in
Table XXIV represent the resolution for which there will be no code flicker within a six-sigma limit. They are not calculated based on
rms noise, but on peak-to-peak noise.
The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the
same as the equivalent bipolar input range. As a result, the numbers in Table XXIII will remain the same for unipolar ranges while
the numbers in Table XXIV will change. To calculate the number for Table XXIV for unipolar input ranges simply divide the peak-
to-peak resolution number in counts by two or subtract one from the peak-to-peak resolution number in bits.
–3 dB
0.98 Hz
1.97 Hz
2.96 Hz
3.95 Hz
7.9 Hz
–3 dB
0.98 Hz
1.97 Hz
2.96 Hz
3.95 Hz
7.9 Hz
Table XXII. Peak-to-Peak Resolution vs. Input Range and Update Rate (CHP = 1)
SF
Word
2048
1024
683
512
256
SF
Word
2048
1024
683
512
256
Table XXI. Output Noise vs. Input Range and Update Rate (CHP = 1)
Settling Time
Normal Mode
920 ms
460 ms
306 ms
230 ms
115 ms
Settling Time
Normal Mode
920 ms
460 ms
306 ms
230 ms
115 ms
Peak-to-Peak Resolution in Counts (Bits)
Typical Output RMS Noise in nV
Settling Time
Fast Mode
120 ms
60 ms
40 ms
30 ms
15 ms
Settling Time
Fast Mode
120 ms
60 ms
40 ms
30 ms
15 ms
–48–
Input Range
= 80 mV
245
340
420
500
650
Input Range
= 80 mV
110k (17)
80k (16.5)
62k (16)
53k (15.5)
44k (15.5)
Input Range
= 40 mV
140
220
270
290
490
Input Range
= 40 mV
94k (16.5)
60k (16)
50k (15.5)
46k (15.5)
27k (15)
Input Range
= 20 mV
105
160
170
180
280
Input Range
= 20 mV
64k (16)
42k (15.5)
39k (15)
36k (15)
24k (14.5)
Input Range
= 10 mV
70
100
110
130
165
Input Range
= 10 mV
46k (15.5)
33k (15)
31k (15)
25k (14.5)
20k (14.5)
REV. A